isl97652 Intersil Corporation, isl97652 Datasheet - Page 19

• Manufacturer Part Number: isl97652
• Description: 4-channel Integrated Lcd Supply With Dual Vcom Amplifiers
• Manufacturer: Intersil Corporation

High Performance V
The integrated high performance amplifiers are designed to
drive the V
operational conditions, the amplifiers are permanently
enabled when the AVIN supply is present. Under fault
conditions and with EN1 active, the temperature shut-down
(T
temperature drops to T
amplifiers is disabled if EN1 is disabled.
The amplifiers integrated in to the ISL97652 feature high
output current of 50mA minimum and high slew rate of
50V/µs. Both inputs and outputs have rail-to-rail capability.
Start-Up Sequence Control
The ISL97652 features extensive start-up sequence control
options. Two enable pins and two delay control pins are
used to set the start-up sequence.
The EN1 enable pin controls the buck regulator and negative
charge pump controller. When EN1 goes H, the internal 5.3V
regulator starts up. Once the regulator output on pin 27
(VDC) exceeds it's UVLO threshold, the REF pin starts to
charge up to the normal output level. Once REF is within
15% of it's final value, the buck regulator will start to operate.
Note that if V
value, all major functions will be disabled until REF returns to
it's normal range. This involves the chip going through the
normal start-up sequence from buck start-up onwards,
depending on the state of the enable signals EN1, EN2. The
soft-start time is set using the capacitor connected to SSB.
Once the output reaches 90% the DLY1 capacitor begins to
OFF
exceeded) will disable the amplifiers until the
COM
REF
plane in TFT-LCD displays. Under normal
moves more than 15% from it's target
VGHM
VFLK
ON
CE
COM
. Temperature shut-down of the
VGL
VGH
0
0
0
19
Amplifiers
SLOPE CONTROLLED
BY RE AND LOAD
CAPACITANCE
FIGURE 21. VON-SLICE TIMING WAVEFORM
ISL97652
charge. Once the threshold is reached, the negative charge
pump will begin. Removing the DLY1 capacitor will cause the
negative charge pump to start immediately once the buck
regulator reaches 90% of the target value. The delay time
and soft-start times are determined using the following
equations:
The EN2 pin is used to control the boost and positive charge
pump circuits.Note that EN2 is ignored until the buck
converter has reached 90% of it's target value. When taken
high, the internal PFET is turned on to connect the input to
the A
control over the soft connect to limit inrush current. Next, the
boost converter starts to operate. The soft-start time for the
boost is set using the capacitor tied to the SS pin. Once the
output reaches 90% of the target value, the DLY2 timer
starts. Once completed, the positive V
starts to operate. If CDL2 is not present, the V
pump will start immediately once the boost is in regulation.
The delay time is determined using the following equation:
T
T
T
T
DLY1
SSB
DLY2
SS
=
VDD
=
C
=
=
C
SS
C
C
~1.265V
SSB
output. A capacitor connected to SUI provides
DL1
DL2
×
V
---------- -
I
T
×
SS
SS
×
×
CE
V
-------------- -
I
V
------------- -
V
------------- -
SSB
I
I
SSB
DL1
DL2
DELAY TIME CONTROLLED BY CE
DL1
DL2
~1.94V
ON
t
t
t
charge pump
ON
November 2, 2007
charge
(EQ. 20)
(EQ. 21)
(EQ. 22)
(EQ. 23)
FN9287.1