pi6c182 Pericom Semiconductor Corporation, pi6c182 Datasheet - Page 3

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pi6c182

Manufacturer Part Number
pi6c182
Description
3.3v, 110mhz Mobile Pc 1 10 Output Clock Driver
Manufacturer
Pericom Semiconductor Corporation
Datasheet

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2-Wire I
The I
output and test mode enable.
The PI6C182 is a slave receiver device. It can not be read back.
Sub-addressing is not supported. All preceding bytes must be sent
in order to change one of the control bytes.
Each byte on the SDATA line must be 8-bits long (MSB first), fol-
lowed by an acknowledge bit generated by the receiver.
During normal data transfers SDATA changes only when SCLOCK
is LOW. Exceptions: A HIGH to LOW transition on SDATA while
SCLOCK is HIGH indicates a “start” condition. A LOW to HIGH
transition on SDATA while SCLOCK is HIGH indicates a “stop”
condition and indicates the end of a data transfer cycle.
Each data transfer is initiated with a start condition and ends with
a stop condition. The first byte after a start condition is always a
Byte1: SDRAM Active/Inactive Register
(1 = enable, 0 = disable)
Maximum Ratings
Supply Current
Storage Temperature............................................................–65°C to +150°C
Ambient Temperature with Power Applied.............................–0°C to +70°C
3.3V Supply Voltage to Ground Potential ..............................–0.5V to +4.6V
DC Input Voltage....................................................................–0.5V to +4.6V
Bit
7
6
5
4
3
2
1
0
2
Symbol
C interface permits individual enable/disable of each clock
I
I
I
I
06-0256
DD
DD
DD
DD
2
Pin
C Control
27
26
23
22
Description
SDRAM7 (Active/Inactive)
SDRAM6 (Active/Inactive)
SDRAM5 (Active/Inactive)
SDRAM4 (Active/Inactive)
NC (Initialize to 0)
NC (Initialize to 0)
NC (Initialize to 0)
NC (Initialize to 0)
(V
DD
= +3.465V, C
Supply Current
Parameter
LOAD
= Max.)
Test Condidtion
BUF_IN = 0 MHz
BUF_IN = 66.66 MHz
BUF_IN = 100.00 MHz
BUF_IN = 133.00 MHz
3
7-bit address byte followed by a read/write bit. (HIGH = read from
addressed device, LOW = write to addressed device). If the device’s
own address is detected, PI6C182 generates an acknowledge by
pulling SDATA line LOW during ninth clock pulse, then accepts
the following data bytes until another start or stop condition is
detected.
Following acknowledgement of the address byte (D2), two more
bytes must be sent:
1. “Command Code” byte
2. “Byte Count” byte.
Although the data bits on these two bytes are “don’t care,” they
must be sent and acknowledged.
Byte2: Optional Register for Possible Future
Requirements (1 = enable, 0 = disable)
Bit
7
6
5
4
3
2
1
0
Pin
18
11
Note:
Stresses greater than those listed under MAXIMUM RAT-
INGS may cause permanent damage to the device. This is
a stress rating only and functional operation of the device
at these or any other conditions above those indicated in
the operational sections of this specification is not implied.
Exposure to absolute maximum rating conditions for ex-
tended periods may affect reliability.
Description
SDRAM9 (Active/Inactive)
SDRAM8 (Active/Inactive)
(Reserved)
(Reserved)
(Reserved)
(Reserved)
(Reserved)
(Reserved)
Min.
Precision 1-to-10 Clock Buffer
Typ.
PI6C182, PI6C182A
Max.
180
240
360
2
PS8165F
Units
mA
01/25/06

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