sy89296u Micrel Semiconductor, sy89296u Datasheet - Page 11

no-image

sy89296u

Manufacturer Part Number
sy89296u
Description
Sy89296u 2.5v/3.3v 1.5ghz Precision Lvpecl Programmable Delay With Fine Tune Control
Manufacturer
Micrel Semiconductor
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
sy89296uMG
Manufacturer:
MICREL
Quantity:
12
Part Number:
sy89296uTG
Manufacturer:
TI
Quantity:
23
Part Number:
sy89296uTG
Manufacturer:
Micrel Inc
Quantity:
10 000
Part Number:
sy89296uTG TR
Manufacturer:
Micrel Inc
Quantity:
10 000
Part Number:
sy89296uTI
Manufacturer:
Micrel Inc
Quantity:
10 000
Part Number:
sy89296uTI TR
Manufacturer:
Micrel Inc
Quantity:
10 000
Micrel, Inc.
techniques, filter V
short. Use multiple vias where possible. Also, use controlled
impedance transmission lines to interface with the SY89296U
data inputs and outputs.
V
available for use only by the SY89296U. When unused, this
pin should be left unconnected. The two common uses for
V
bias inputs for AC-coupling applications.
is used to bias the unused input. Please refer to Figure 10.
The PECL signal driving the SY89296U may optionally be
inverted in this case.
in Figure 13, to re-bias IN and/or /IN. This ensures that
SY89296U inputs are within acceptable common mode
range.
limited to 0.5mA or less.
M9999-072706
hbwhelp@micrel.com or (408) 955-1690
BB
BB
APPLICATIONS INFORMATION
For best performance, use good high frequency layout
The VBB pin is an internally generated reference and is
If either IN or /IN is driven by a single-ended output, V
When the signal is AC-coupled, V
In all cases, V
Reference
are to handle a single-ended PECL input, and to re-
CC
BB
supplies, and keep ground connections
current sinking or sourcing must be
IN
/IN
DAC
BB
#1
SETMAX
SETMIN
DAC
Figure 8. Cascading Three SY89296U
is used, as shown
Figure 7. Cascading Two SY89296U
/Q
Q
IN
/IN
C[11]
#1
SETMAX
SETMIN
Control Word (12bits)
FTUNE
D[10]
IN
/IN
/CASCADE
CASCADE
Control Word (11bits)
BB
/Q
Q
11
#2
SETMAX
SETMIN
FTUNE
Setting D Input Logic Thresholds
zero volts, the D inputs can accommodate CMOS and TTL
level signals, as well as PECL or LVPECL. Figures 11, 12,
and 14 show how to connect V
cases.
Cascading
extend the range of delays permitted. Each additional
SY89296U adds about 3.2ns to the minimum delay and
adds another 10240ps to the delay range.
SY89296U. Using this internal circuitry, the SY89296U may
be cascaded without any external gating.
Figures 7, 8, and 9.
C[9:0]
C[10]
In all designs where the SY89296U GND supply is at
Two or more SY89296U may be cascaded in order to
Internal cascade circuitry has been included in the
Examples of cascading 2, 3, or 4 SY89296U appear in
/Q
Q
D[10]
D[9:0]
IN
/IN
/CASCADE
CASCADE
C[9:0]
C[10]
#2
FTUNE
D[10]
D[9:0]
IN
/IN
/CASCADE
CASCADE
/Q
Q
#3
FTUNE
/Q
Q
CF
and V
EF
Precision Edge
for all possible
SY89296U
®

Related parts for sy89296u