sy87700al Micrel Semiconductor, sy87700al Datasheet - Page 13

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sy87700al

Manufacturer Part Number
sy87700al
Description
Sy87700al Sy87700 Low-power, 3.3v, 32mbps To 208mbps Anyrate Clock And Data Recovery
Manufacturer
Micrel Semiconductor
Datasheet

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August 2007
Appendix A
Layout and General Suggestions
1.
2.
3.
4.
5.
Establish controlled impedance stripline, microstrip, or
coplanar construction techniques.
Signal paths should have approximately the same width
as the device pads.
All differential paths are critical timing paths, where
skew should be matched to within ±10ps.
Signal trace impedance should not vary more than
±5%. If in doubt, perform TDR analysis of all high-speed
signal traces.
Maintain compact filter networks as close to filter pins
as possible. Provide ground plane relief under filter path
to reduce stray capacitance. Be careful of crosstalk
coupling into the filter network.
13
6.
7.
8.
Maintain low jitter on the REFCLK input. Isolate the
XTAL oscillator from power supply noise by adequately
decoupling. Keep XTAL oscillator close to device, and
minimize capacitive coupling from adjacent signals.
Higher speed operation may require use of
fundamental-tone (third-overtone typically has more
jitter) crystal-based oscillator for optimum performance.
Evaluate and compare candidates by measuring
TXCLK jitter.
All unused outputs must be terminated. To conserve
power, unused PECL outputs can be terminated with a
1kΩ resistor to V
hbwhelp@micrel.com
EE
.
or (408) 955-1690
M9999-082107-C

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