lmx2532 National Semiconductor Corporation, lmx2532 Datasheet - Page 16
lmx2532
Manufacturer Part Number
lmx2532
Description
Pllatinum Frequency Synthesizer System With Integrated Vcos
Manufacturer
National Semiconductor Corporation
Datasheet
1.LMX2532.pdf
(18 pages)
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Programming Description
R4 REGISTER
The R4 register address bits (R3 [3:0]) are “0111”.
Register R4 is used to set the IF N counters if the default value is not desired. This register is only active if the SPI_DEF bit in
register R0 is 0.
The IF N counter consists of the 9-bit programmable counter (IF_B counter) and the 4-bit swallow counter (IF_A counter). The
equations for calculating the counter values are presented below.
IF Frequency Setting:
f
where
f
IF_B: Preset divide ratio of binary 9-bit programmable counter (1 ≤ IF_B ≤ 511)
IF_A: Preset divide ratio of binary 4-bit swallow counter (0 ≤ IF_A ≤ 15)
IF_R: Preset divide ratio of binary 9-bit programmable reference counter (2 ≤ IF_R ≤ 511)
f
R5 REGISTER
The R5 register address bits (R5 [4:0]) are “01111”.
Register R5 is used to set the IF_R divider if the default value is not desired. This register is only active if the SPI_DEF bit in
register R0 is 0.
VCO
VCO
OSC
R4
R5
: Output frequency of IF voltage controlled oscillator (IF VCO)
: Reference oscillator frequency
= {16 x IF_B + IF_A} x f
MSB
23
0
MSB
23
0
22
0
22
0
21
0
21
1
Name
IF_A [3:0]
IF_B [8:0]
Name
IF_R [8:0]
20
1
20
1
OSC
19
0
19
0
/ R where (IF_A
18
0
18
0
17
0
17
0
(Continued)
16
16
0
SHIFT REGISTER BIT LOCATION
SHIFT REGISTER BIT LOCATION
Data Field
<
Data Field
15
15
1
IF_B)
IF_A
[3:0]
R4 REGISTER
R5 REGISTER
14
14
0
16
13
13
12
12
11
11
Functions
IF A Counter
4-bit swallow counter
0 ≤ IF_A ≤ 15
IF B Counter
9-bit programmable counter
1 ≤ IF_B ≤ 511
Functions
IF R Counter
9-bit programmable counter
2 ≤ IF_R ≤ 511
10
10
IF_R
[8:0]
9
9
IF_B
[8:0]
8
8
7
7
6
6
5
5
4
4
0
3
0
3
1
Address
Field
Address
2
1
2
1
Field
1
1
1
1
LSB
0
1
LSB
0
1