w83194br-655 Winbond Electronics Corp America, w83194br-655 Datasheet - Page 12

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w83194br-655

Manufacturer Part Number
w83194br-655
Description
Clock For Sis Chipsets Winbond Clock Generator
Manufacturer
Winbond Electronics Corp America
Datasheet
7. I2C CONTROL AND STATUS REGISTERS
7.1
7.2
BIT
BIT
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
Register 0: Frequency Select (Default = 20h)
Register 1: CPU Control (1 = Enable, 0 = Stopped) (Default: E4h)
SSEL [4]
SSEL [3]
SSEL [2]
SSEL [1]
SSEL [0]
EN_SSEL
EN_SPSP
EN_SAFE_FREQ
PIN NO
44,43
40,39
NAME
15
14
12
3
2
-
PWD
X
X
X
X
X
1
1
1
PWD
0
0
1
0
0
0
0
0
Reserved
CPUT1 / C1 output control
CPUT0 / C0 output control
Power on latched value of FS4 pin. Default: 0 (Read only)
Power on latched value of FS3 pin. Default: 0 (Read only)
Power on latched value of FS2 pin. Default: 1 (Read only)
Power on latched value of FS1 pin. Default: 0 (Read only)
Power on latched value of FS0 pin. Default: 0 (Read only)
Frequency selection by software via I
Enable software table selection FS [4:0].
0 = Hardware table setting (Jump mode).
1 = Software table setting through Bit7~3. (Jump less mode)
Enable spread spectrum mode under clock output.
0 = Spread Spectrum mode disable
1 = Spread Spectrum mode enable
After watchdog timeout
0 = Reload the hardware FS [4:0] latched pins setting.
1 = Reload the desirable frequency table selection defined at Reg-5
Bit 4~0.
W83194BR-655/W83194BG-655
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DESCRIPTION
DESCRIPTION
2
C

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