w83194br-603 Winbond Electronics Corp America, w83194br-603 Datasheet - Page 19

• Manufacturer Part Number: w83194br-603
• Description: Winbond Clock Generator For Intel P4 Springdale Series Chipset
• Manufacturer: Winbond Electronics Corp America

7.20 Register 19: Control Register (Default: D2h)
7.21 Register 20: Watch dog timer Register (Default: 88h)
7.22 Register21: Control Register (Default: 00h)
BIT
BIT
BIT
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
Tri-state
Reserved
Reserved
FIX_SEL
SRCF0
ASEL_2
ASEL_1
ASEL_0
CPU1STOP_EN
CPU0STOP_EN
SRC_S2
SRC_S1
INV_48MHz
48MHz_S2
48MHz_S1
MODE
SRCF1
WD_TIME [6]
WD_TIME [5]
WD_TIME [4]
WD_TIME [3]
WD_TIME [2]
WD_TIME [1]
WD_TIME [0]
CLOCK GEN. FOR INTEL P4 SPRINGDALE/PRESCOTT SERIES CHIPSET
NAME
NAME
NAME
PWD
PWD
0
0
0
1
0
0
0
1
PWD
0
0
0
0
0
0
0
0
X
1
1
0
1
0
0
1
SRC frequency select, 00/01: 25MHz, 10: 100MHZ(Default), 11:
200MHz
Setting the down count depth. One bit resolution represents 250ms.
Default time depth is 8*250ms = 2.0 second. If the watchdog timer is
counting, this register will return present down count value
Tri-state all output if set 1
Don’t modify it
Don’t modify it
3V66 output frequency select mode
0: Output frequency according to frequency selection table
1: Output frequency according to FIX frequency Reg21 bit 0~2
SRC frequency select, 0:100MHz. (Default), 1:200MHz
Asynchronous 3V66/PCI frequency table selection
ASEL_<2:0>
Stop CPU1 clocks, 1: Enable stop feature, 0: Disable
Stop CPU0 clocks, 1: Enable stop feature, 0: Disable
SRC slew rate control
11: Strong, 00: Weak, 10/01: Normal
Invert the 48MHz phase, 0: In phase with 24_48MHz
1: 180 degrees out of phase
48MHz/24_48MHz slew rate control
11: Strong, 00: Weak, 10/01: Normal
Pin 30 Mode selection, 1: RESET# output, 0: 3V66_0 (Default)
Default value follow hardware trapping data on MODE
001: 66 / 33M
011: 88 / 44M
101: 66 / 33M
111: 88 / 33M
W83194BR-603/W83194BG-603
- 15 -
010: 75.43 / 37.7M
100: 88 / 44M
110: 75.43 / 33M
000: Clock from PLL1
DESCRIPTION
DESCRIPTION
DESCRIPTION
Publication Release Date: March, 2006
&
/PCI0 pin.
Revision 0.7