w83194br-619 Winbond Electronics Corp America, w83194br-619 Datasheet - Page 18

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w83194br-619

Manufacturer Part Number
w83194br-619
Description
Winbond Clock Generator For Intel P4 Springdale Series Chipset P4 Springdale Series Chipset
Manufacturer
Winbond Electronics Corp America
Datasheet
7.16 Register 13: Control Register (Default =0FH)
7.17 Register 14: Control Register (Default =32H)
BIT
BIT
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
EN_MN_PROG
CLOCK GEN. FOR INTEL P4 SPRINGDALE/PRESCOTT SERIES CHIPSET
CPUT_DRI
SRCT_DRI
SPCNT [5]
SPCNT [4]
SPCNT [3]
SPCNT [2]
SPCNT [1]
SPCNT [0]
IVAL<3>
IVAL<2>
IVAL<1>
IVAL<0>
Reserve
Reserve
Reserve
NAME
NAME
PWD
PWD
0
0
1
1
0
0
1
0
0
0
0
0
1
1
1
1
CPUT output state in during POWER DOWN or Stop mode assertion.
1: Driven
CPUC always tri-state (floating) in power down Assertion.
SRC_T output state in during POWER DOWN or Stop mode assertion.
1: Driven
SRC_C always tri-state (floating) in power down Assertion.
Spread Spectrum Programmable time, the resolution is 280ns.
Default period is 11.8us
0: Output frequency depend on frequency table
1: Program all clock frequency by changing M/N value
The equation is VCO =14.318MHz*(N+4)/ M.
Once the watchdog timer timeout, the bit will be clear. Then the
frequency will be decided by hardware default FS<4:0> or desired
frequency select SAF_FREQ [4:0] depend on EN_SAFE_FREQ
(Reg9 - bit 7).
Reserved
Reserved
Charge pump current selection
(2*Iref), 0: Tristate (Floating)
(6*Iref), 0: Tristate (Floating)
W83194BR-619/W83194BG-619
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DESCRIPTION
DESCRIPTION

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