lmh2190 National Semiconductor Corporation, lmh2190 Datasheet - Page 19

• Manufacturer Part Number: lmh2190
• Description: Lmh2190 Quad Channel 27 Mhz Clock Tree Driver With I2c Interface
• Manufacturer: National Semiconductor Corporation

Field
CLK2 Load
CLK_REQ2 Input Polarity
CLK_REQ2 Force ON Control
CLK_REQ2 Force OFF Control
CLK_REQ2 Pull down Resistor
Reserved
Reserved
Field
CLK3 Load
CLK_REQ3 Input Polarity
CLK_REQ3 Force ON Control
CLK_REQ3 Force OFF Control
CLK_REQ3 Pull down Resistor
Reserved
Reserved
Address = 02H, type = R/W, reset value = 06H, 0000_0110, Bold face settings are the default configuration.
Address = 03H, type = R/W, reset value = 06H, 0000_0110, Bold face settings are the default configuration.
[1-0]
[1-0]
Bits
Bits
[2]
[3]
[4]
[5]
[6]
[7]
[2]
[3]
[4]
[5]
[6]
[7]
Description
Sets the drive strength of the clock output based on the capacitive load.
00 - 10pF to 15pF
01 - 15pF to 22.5pF
10 - 22.5pF to 33.5pF
11 - 33.5pF to 50pF
Sets whether a logic low or high enables the clock output.
0 - Logic low enables the clock output.
1 - Logic high enables the clock output.
Selects whether to use a clock request or I
0 - Use the clock request pin to control the output.
1 - Force the clock output to be enabled (Force ON).
Selects whether to use a clock request or I
0 - Use the clock request pin to control the output.
1 - Force the clock output to be disabled (Force OFF). ”Force OFF" overrides ”Force
ON".
Selects whether an internal 200 kΩ pull down resistor on the clock request input to GND
is present.
0 - No internal pull down resistor is present.
1 - Internal 200 kΩ pull-down resistor is present.
Description
Sets the drive strength of the clock output based on the capacitive load.
00 - 10pF to 15pF
01 - 15pF to 22.5pF
10 - 22.5pF to 33.5pF
11 - 33.5pF to 50pF
Sets whether a logic low or high enables the clock output.
0 - Logic low enables the clock output.
1 - Logic high enables the clock output.
Selects whether to use a clock request or I
0 - Use the clock request pin to control the output.
1 - Force the clock output to be enabled (Force ON).
Selects whether to use a clock request or I
0 - Use the clock request pin to control the output.
1 - Force the clock output to be disabled (Force OFF). ”Force OFF" overrides ”Force
ON".
Selects whether an internal 200 kΩ pull down resistor on the clock request input to GND
is present.
0 - No internal pull down resistor is present.
1 - Internal 200 kΩ pull-down resistor is present.
TABLE 4. CLK2 Output Register
TABLE 5. CLK3 Output Register
19
2
2
2
2
C logic to enable the output.
C logic to disable the output.
C logic to enable the output.
C logic to disable the output.
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