nb6n11s ON Semiconductor, nb6n11s Datasheet

no-image

nb6n11s

Manufacturer Part Number
nb6n11s
Description
3.3 V 1 2 Anylevel Tm Input To Lvds Fanout Buffer /translator
Manufacturer
ON Semiconductor
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
nb6n11sMNG
Manufacturer:
ON
Quantity:
311
Part Number:
nb6n11sMNG
Manufacturer:
ON Semiconductor
Quantity:
4
Part Number:
nb6n11sMNG
Manufacturer:
ON/安森美
Quantity:
20 000
Company:
Part Number:
nb6n11sMNG
Quantity:
2 500
NB6N11S
3.3 V 1:2 AnyLevelE Input
to LVDS Fanout Buffer /
Translator
Description
accept AnyLevel input signals: LVPECL, CML, LVCMOS, LVTTL,
or LVDS. These signals will be translated to LVDS and two identical
copies of Clock or Data will be distributed, operating up to 2.0 GHz or
2.5 Gb/s, respectively. As such, the NB6N11S is ideal for SONET,
GigE, Fiber Channel, Backplane and other Clock or Data distribution
applications.
GND + 50 mV to V
termination resistors at the inputs, the NB6N11S is ideal for
translating a variety of differential or single−ended Clock or Data
signals to 350 mV typical LVDS output levels.
SG11 or 7L11M devices and is offered in a small, 3 mm X 3 mm,
16−QFN package. Application notes, models, and support
documentation are available at www.onsemi.com.
performance products.
Features
© Semiconductor Components Industries, LLC, 2007
April, 2007 − Rev. 1
The NB6N11S is a differential 1:2 Clock or Data Receiver and will
The NB6N11S has a wide input common mode range from
The NB6N11S is functionally equivalent to the EP11, LVEP11,
The NB6N11S is a member of the ECLinPS MAX™ family of high
SG Devices
Maximum Input Clock Frequency > 2.0 GHz
Maximum Input Data Rate > 2.5 Gb/s
1 ps Maximum of RMS Clock Jitter
Typically 10 ps of Data Dependent Jitter
380 ps Typical Propagation Delay
120 ps Typical Rise and Fall Times
Functionally Compatible with Existing 3.3 V LVEL, LVEP, EP, and
These are Pb−Free Devices
PRBS 2
Figure 2. Typical Output Waveform at 2.488 Gb/s with
23−1
(V
CC
INPP
− 50 mV. Combined with the 50 W internal
Device DDJ = 10 ps
= 400 mV; Input Signal DDJ = 14 ps)
TIME (58 ps/div)
1
See detailed ordering and shipping information in the package
dimensions section on page 8 of this data sheet.
V
V
*For additional marking information, refer to
CASE 485G
MN SUFFIX
TD
TD
Application Note AND8002/D.
D
D
(Note: Microdot may be in either location)
QFN−16
1
ORDERING INFORMATION
Figure 1. Logic Diagram
A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
G = Pb−Free Package
http://onsemi.com
Publication Order Number:
1
16
DIAGRAM*
MARKING
ALYW G
NB6N
11S
G
NB6N11S/D
Q0
Q0
Q1
Q1

Related parts for nb6n11s

Related keywords