max9152euet Maxim Integrated Products, Inc., max9152euet Datasheet - Page 4

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max9152euet

Manufacturer Part Number
max9152euet
Description
Max9152 800mbps, Lvds/lvpecl-to-lvds 2 X 2 Crosspoint Switch
Manufacturer
Maxim Integrated Products, Inc.
Datasheet
800Mbps LVDS/LVPECL-to-LVDS 2 x 2
Crosspoint Switch
AC ELECTRICAL CHARACTERISTICS (continued)
(V
|V
(V
at V
(V
pattern, V
4
Note 1: Current into a pin is defined as positive. Current out of a pin is defined as negative. All voltages are referenced to ground
Note 2: Guaranteed by design and characterization, not production tested.
Note 3: AC parameters are guaranteed by design and characterization.
Note 4: C
Note 5: t
Note 6: t
Note 7: Specification includes test equipment jitter.
Pulse Skew |t
Output Channel-to-Channel Skew
Output Low-to-High Transition
Time (20% to 80%)
Output High-to-Low Transition
Time (20% to 80%)
LVDS Data Path Peak-to-Peak
Jitter (Note 7)
ID
CC
IN+
CC
| = 0.15V to V
CC
_______________________________________________________________________________________
CONDITIONS: 3.3V, PRBS = 2
|V
HORIZONTAL SCALE = 200ps/div
VERTICAL SCALE = 100mV/div
, V
= +3.0V to +3.6V, NC/RSEL = open for R
DIFFERENTIAL OUTPUT EYE PATTERN
= +3.3V, R
IN 1:2 SPLITTER MODE AT 800Mbps
ID
= +3.3V, |V
| = 200mV, V
IN-
except V
SET
SKEW
CM
) = 0 to V
L
PARAMETER
includes scope probe and test jig capacitance.
and t
= +1.2V, T
PLHD
is the magnitude difference of differential propagation delay over rated conditions; t
CM
L
TH
= 100Ω, NC/RSEL = high, C
CC
= +1.2V
ID
HOLD
CC
, V
| = 0.2V, V
-t
, EN_ = high, SEL0 = low, SEL1 = high, differential input transition time = 0.6ns (20% to 80%), input voltage
PHLD
, LVCMOS/LVTTL inputs = 0 to 3V with 2ns (10% to 90%) transition times, T
TL
A
23
time specify that data must be in a stable state before and after the SEL transition.
, V
-1 DATA PATTERN,
= +25°C, unless otherwise noted.)
| (Note 6)
ID
, V
CM
OD
= 1.2V, T
, and ∆V
SYMBOL
t
SKEW
t
t
t
CCS
t
LHT
HLT
JIT
A
OD
= +25°C, unless otherwise noted.) (Notes 3, 4)
.
L
L
= 5pF, input transition time = 600ps (20% to 80%), V
= 75Ω ±1%, NC/RSEL = high for R
650
550
450
350
250
150
Figures 5, 6
Figures 5, 7
Figures 5, 6
Figures 5, 6
V
cycle, 800Mbps, input transition time =
600ps (20% to 80%)
V
data pattern, 800Mbps, input transition
time = 600ps (20% to 80%)
50
ID
ID
= 200mV, V
= 200mV, V
NC/RSEL = LOW OR OPEN
75
OUTPUT VOLTAGE vs. LOAD
LOAD RESISTOR (Ω)
100
DIFFERENTIAL
CONDITIONS
CM
CM
125
= 1.2V, PRBS = 2
= 1.2V, 50% duty
Typical Operating Characteristics
NC/RSEL = HIGH
150
175
L
= 100Ω ±1%, C
200
23
- 1
40
38
36
34
32
30
100
A
MIN
SKEW
160
160
ID
SUPPLY CURRENT vs. DATA RATE
= -40°C to +85°C. Typical values
L
200
= 5pF, differential input voltage
= 200mV, PRBS = 2
= |t
300
DATA RATE (Mbps)
PHLD
TYP
270
270
25
20
10
65
400
- t
500
PLHD
MAX
480
480
120
90
50
30
600
|.
23
700
- 1 data
UNITS
ps
ps
ps
ps
ps
800

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