nbsg14 ON Semiconductor, nbsg14 Datasheet - Page 2

• Manufacturer Part Number: nbsg14
• Description: 2.5v/3.3v Sige Differential 1 4 Clock/data Driver With Rsecl Outputs
• Manufacturer: ON Semiconductor

Table 1. Pin Description
1. In the differential configuration when the input termination pins (VTCLK, VTCLK) are connected to a common termination voltage, if no
*Devices in LGA package typically terminated with 50 W to V
Figure 1. BGA-16 and LGA-16 Pinout (Top View)
B2,C2
B3,C3
BGA
signal is applied then the device will be susceptible to self-oscillation.
C4*
D4*
D3*
D2*
N/A
A2*
A3*
A4*
B4*
D1
C1
B1
A1
C
D
A
B
Pin
VTCLK
VTCLK
CLK
CLK
QFN
5,16
8,13
1
10
12
14
15
11
1
2
3
4
6
7
9
-
VEE
VEE
Q3
Q0
2
VTCLK
VTCLK
Name
CLK
CLK
V
V
EP
Q3
Q3
Q2
Q2
Q1
Q1
Q0
Q0
CC
EE
VCC
VCC
Q3
Q0
3
LVCMOS, LVDS,
LVCMOS, LVDS,
RSECL Output
RSECL Output
RSECL Output
RSECL Output
RSECL Output
RSECL Output
RSECL Output
RSECL Output
LVTTL Input
LVTTL Input
ECL, CML,
ECL, CML,
4
Q2
Q2
Q1
Q1
I/O
-
-
-
-
-
http://onsemi.com
VTCLK
VTCLK
TT
Internal 50 W Termination pin. See Table 2.
Inverted Differential Input. Internal 75 kW to V
Noninverted Differential Input. Internal 75 kW to VEE.
Internal 50 W Termination Pin. See Table 2.
Negative Supply Voltage. All V
Power Supply to Guarantee Proper Operation.
Inverted Differential Output 3. Typically Terminated with 50 W to
V
Noninverted Differential Output 3. Typically Terminated with 50 W to
V
Positive Supply Voltage. All V
Power Supply to Guarantee Proper Operation.
Inverted Differential Output 2. Typically Terminated with 50 W to
V
Noninverted Differential Output 2. Typically Terminated with 50 W to
V
Inverted Differential Output 1. Typically Terminated with 50 W to
V
Noninverted Differential Output 1. Typically Terminated with 50 W to
V
Inverted Differential Output 0. Typically Terminated with 50 W to
V
Noninverted Differential Output 0. Typically Terminated with 50 W to
V
Exposed Pad. The thermally exposed pad on package bottom (see case
drawing) must be attached to a heat-sinking conduit.
NBSG14
CLK
CLK
= V
TT
TT
TT
TT
TT
TT
TT
TT
= V
= V
= V
= V
= V
= V
= V
= V
CC
2
Figure 2. QFN-16 Pinout (Top View)
CC
CC
CC
CC
CC
CC
CC
CC
- 1.5 V.
1
2
3
4
- 2 V*
- 2 V*
- 2 V*
- 2 V*
- 2 V*
- 2 V*
- 2 V*
- 2 V*
V
V
16
EE
5
EE
Q0
15
Q3
NBSG14
6
Q0
14
Q3
7
CC
EE
Description
Pins must be Externally Connected to
Pins must be Externally Connected to
V
V
13
8
CC
CC
12
10
11
9
EE
Q1
Q1
Q2
Q2
and 36.5 kW to V
Exposed Pad (EP)
CC
.