74lvc16240adl NXP Semiconductors, 74lvc16240adl Datasheet - Page 10

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74lvc16240adl

Manufacturer Part Number
74lvc16240adl
Description
16-bit Buffer/line Driver; Inverting 3-state
Manufacturer
NXP Semiconductors
Datasheet
Philips Semiconductors
Table 8:
GND = 0 V; t
[1]
[2]
[3]
[4]
[5]
12. Waveforms
9397 750 12871
Product data sheet
Symbol
t
t
PHZ
sk(0)
, t
All typical values are measured at T
These typical values are measured at V
Skew between any two outputs of the same package switching in the same direction. This parameter is guaranteed by design.
C
P
f
f
C
V
N = total load switching outputs;
The condition is V
i
o
(C
D
CC
PD
= input frequency in MHz;
L
PLZ
= output frequency in MHz;
= output load capacitance in pF;
= C
L
is used to determine the dynamic power dissipation (P
= supply voltage in V;
PD
V
Parameter
3-state output disable
time nOE to nYn
skew
Dynamic characteristics
CC
r
= t
2
V
CC
f
f
o
2
) = sum of the outputs.
2.5 ns; C
I
= GND to V
f
i
N + (C
Table 9:
Supply voltage
V
1.2 V
2.7 V
3.0 V to 3.6 V
Fig 4. The input nAn to output nYn propagation delays.
CC
L
= 50 pF; R
L
CC
.
Measurement points are given in
V
V
OL
CC
amb
Conditions
see
V
Measurement points
2
CC
…continued
and V
V
V
V
CC
= 25 C.
CC
CC
CC
L
Figure 5
f
= 3.0 V to 3.6 V
o
= 500 ; see
= 3.3 V.
) where:
= 1.2 V
= 2.7 V
= 3.0 V to 3.6 V
OH
are typical output voltage drop that occur with the output load.
Input
V
0.5
1.5 V
1.5 V
nAn input
nYn output
M
Rev. 03 — 5 March 2004
GND
V
V
V
Figure
OH
OL
CC
D
V
in W).
I
16-bit buffer/line driver with 5 V tolerant inputs/outputs
6.
Table
V
M
t
PHL
9.
V
M
[3]
Min
-
1.5
1.5
-
Output
V
0.5
1.5 V
1.5 V
V
M
M
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
t
PLH
74LVC16240A
V
CC
Typ
-
-
-
-
mgu781
V
M
Max
-
6.5
6.5
1.5
Unit
ns
ns
ns
ns
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