74lvt534 NXP Semiconductors, 74lvt534 Datasheet - Page 2

• Manufacturer Part Number: 74lvt534
• Description: 3.3v Octal D-type Flip-flop; Inverting 3-state
• Manufacturer: NXP Semiconductors

Philips Semiconductors
FEATURES
QUICK REFERENCE DATA
ORDERING INFORMATION
PIN CONFIGURATION
20-Pin Plastic SOL
20-Pin Plastic SSOP Type II
20-Pin Plastic TSSOP Type I
2004 Aug 25
3-State outputs for bus interfacing
Common output enable
TTL input and output switching levels
Input and output interface capability to systems at 5 V supply
Bus-hold data inputs eliminate the need for external pull-up
resistors to hold unused inputs
Live insertion/extraction permitted
No bus current loading when output is tied to 5 V bus
Power-up 3-State
Power-up reset
Latch-up protection exceeds 500mA per JEDEC Std 17
ESD protection exceeds 2000 V per MIL STD 883 Method 3015
and 200 V per Machine Model
3.3 V Octal D-type flip-flop, inverting (3-State)
SYMBOL
C
I
t
t
C
PLH
PHL
CCZ
OUT
IN
PACKAGES
GND
Propagation delay
CP to Qn
Input capacitance
Output capacitance
Total supply current
OE
Q0
Q1
Q2
Q3
D0
D1
D2
D3
10
1
2
3
4
5
6
7
8
9
PARAMETER
SA00161
20
19
18
17
16
15
14
13
12
11
V
Q7
D7
D6
Q6
Q5
D5
D4
Q4
CP
CC
TEMPERATURE RANGE
–40 C to +85 C
–40 C to +85 C
–40 C to +85 C
C
V
V
Outputs disabled;
V
Outputs disabled;
V
L
CC
I
I/O
CC
= 0 V or 3.0 V
= 50 pF;
= 0 V or 3.0 V
= 3.3 V
= 3.6 V
2
T
DESCRIPTION
The LVT534 is a high-performance BiCMOS product designed for
V
This device is an 8-bit, edge triggered register coupled to eight
3-State output buffers. The two sections of the device are controlled
independently by the clock (CP) and Output Enable (OE) control
gates. The state of each D input (one set-up time before the
LOW-to-HIGH clock transition) is transferred to the corresponding
flip-flop’s Q output.
The 3-State output buffers are designed to drive heavily loaded
3-State buses, MOS memories, or MOS microprocessors. The
active-LOW Output Enable (OE) controls all eight 3-State buffers
independent of the clock operation.
When OE is LOW, the stored data appears at the outputs. When OE
is HIGH, the outputs are in the high-impedance “off” state, which
means they will neither drive nor load the bus.
PIN DESCRIPTION
amb
PIN NUMBER
13, 14, 17, 18
12, 15, 16, 19
CC
3, 4, 7, 8,
2, 5, 6, 9,
operation at 3.3 V.
CONDITIONS
= 25 C; GND = 0 V
10
20
11
1
TYPE NUMBER
74LVT534PW
74LVT534DB
SYMBOL
74LVT534D
Q0 to Q7
D0 to D7
GND
V
OE
CP
CC
Output enable input (active-LOW)
Data inputs
Inverting 3-State outputs
Clock pulse input (active rising
edge)
Ground (0 V)
Positive supply voltage
TYPICAL
FUNCTION
0.13
3.0
3.5
4
7
74LVT534
DWG NUMBER
SOT163-1
SOT339-1
SOT360-1
Product data
UNIT
mA
pF
pF
ns