74lvx541 STMicroelectronics, 74lvx541 Datasheet

no-image

74lvx541

Manufacturer Part Number
74lvx541
Description
Low Voltage Cmos Octal Bus Buffer 3-state Non Inv. With 5v Tolerant Inputs
Manufacturer
STMicroelectronics
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
74LVX541
Manufacturer:
ST
0
Part Number:
74lvx541MTC
Manufacturer:
FAIRCHILD/仙童
Quantity:
20 000
Part Number:
74lvx541MTR
Manufacturer:
ST
0
Part Number:
74lvx541MX
Manufacturer:
FSC
Quantity:
2 118
Part Number:
74lvx541TTR
Manufacturer:
ST
0
DESCRIPTION
The 74LVX541 is a low voltage CMOS OCTAL
BUS BUFFER with 3 STATE OUTPUT NON
INVERTING fabricated with sub-micron silicon
gate and double-layer metal wiring C
technology. It is ideal for low power, battery
operated and low noise 3.3V applications.
The 3 STATE control gate operates as two input
AND such that if either G1 or G2 are high, all eight
outputs are in the high impedance state.
Figure 1: Pin Connection And IEC Logic Symbols
August 2004
HIGH SPEED:
t
5V TOLERANT INPUTS
POWER-DOWN PROTECTION ON INPUTS
INPUT VOLTAGE LEVEL:
V
LOW POWER DISSIPATION:
I
LOW NOISE:
V
SYMMETRICAL OUTPUT IMPEDANCE:
|I
BALANCED PROPAGATION DELAYS:
t
OPERATING VOLTAGE RANGE:
V
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 541
IMPROVED LATCH-UP IMMUNITY
PD
CC
PLH
OH
IL
OLP
CC
= 5.0 ns (TYP.) at V
= 0.8V, V
= 4 A (MAX.) at T
| = I
(OPR) = 2V to 3.6V (1.2V Data Retention)
= 0.3V (TYP.) at V
t
PHL
OL
= 4 mA (MIN) at V
IH
(3-STATE NON INV.) WITH 5V TOLERANT INPUTS
= 2V at V
A
CC
=25°C
CC
CC
LOW VOLTAGE CMOS OCTAL BUS BUFFER
= 3.3V
=3.3V
=3V
CC
=3V
2
MOS
Table 1: Order Codes
In order to enhance PC board layout, the
74VHC541 offers a pinout having inputs and
outputs on opposite sides of the package.
Power down protection is provided on all inputs
and 0 to 7V can be accepted on inputs with no
regard to the supply voltage.
This device can be used to interface 5V to 3V. It
combines high speed performance with the true
CMOS low power consumption.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
PACKAGE
TSSOP
SOP
SOP
74LVX541
Rev. 2
74LVX541MTR
74LVX541TTR
TSSOP
T & R
1/12

Related parts for 74lvx541

74lvx541 Summary of contents

Page 1

... PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 541 IMPROVED LATCH-UP IMMUNITY DESCRIPTION The 74LVX541 is a low voltage CMOS OCTAL BUS BUFFER with 3 STATE OUTPUT NON INVERTING fabricated with sub-micron silicon gate and double-layer metal wiring C technology ideal for low power, battery operated and low noise 3 ...

Page 2

... Figure 2: Input Equivalent Circuit Table 3: Truth Table Don’t Care Z : High Impedance Table 4: Absolute Maximum Ratings Symbol V Supply Voltage Input Voltage Output Voltage Input Diode Current Output Diode Current Output Current ...

Page 3

... CC (V) Min. 3.3 -0 3.3 2.0 L 3.3 Value = 25°C -40 to 85°C -55 to 125°C A Typ. Max. Min. Max. Min. 1.5 1.5 2.0 2.0 2.4 2.4 0.5 0.5 0.8 0.8 0.8 0.8 2.0 1.9 1.9 3.0 2.9 2.9 2.48 2.4 0.0 0.1 0.1 0.0 0.1 0.1 0.36 0.44 0.25 2.5 0 Value = 25°C -40 to 85°C -55 to 125°C A Typ. Max. Min. Max. Min. 0.3 0.8 -0.3 0.8 74LVX541 Unit Max. V 0.5 0.8 V 0.8 V 0.1 0.1 V 0.55 2 Unit Max threshold ILD 3/12 ...

Page 4

... Table 8: AC Electrical Characteristics (Input t Symbol Parameter t Propagation Delay PLH Time t PHL 3.3 3.3 t Output Enable PZL Time t PZH 3.3 3.3 t Output Disable PLZ t Time 3.3 PHZ Output to Output t OSLH Skew Time (note t 3.3 OSHL 1,2) 1) Skew is defined as the absolute value of the difference between the actual propagation delay for any two outputs of the same device switch- ...

Page 5

... Figure 3: Test Circuit PLH PHL PZL PLZ PZH PHZ C =15/50pF or equivalent (includes jig and probe capacitance equivalent pulse generator (typically OUT Figure 4: Waveform - Propagation Delays (f=1MHz; 50% duty cycle) TEST 74LVX541 SWITCH Open V CC GND 5/12 ...

Page 6

... Figure 5: Waveform - Output Enable And Disable Times (f=1MHz; 50% duty cycle) 6/12 ...

Page 7

... MIN. A 2.35 A1 0.1 B 0.33 C 0.23 D 12. 10.00 h 0.25 L 0.4 k 0° ddd mm. TYP MAX. 2.65 0.093 0.30 0.004 0.51 0.013 0.32 0.009 13.00 0.496 7.6 0.291 1.27 10.65 0.394 0.75 0.010 1.27 0.016 8° 0.100 74LVX541 inch MIN. TYP. 0.050 0° 0016022D MAX. 0.104 0.012 0.020 0.013 0.512 0.299 0.419 0.030 0.050 8° 0.004 7/12 ...

Page 8

... DIM. MIN 0.05 A2 0.8 b 0.19 c 0.09 D 6.4 E 6 0˚ PIN 1 IDENTIFICATION 1 8/12 TSSOP20 MECHANICAL DATA mm. TYP MAX. 1.2 0.15 1 1.05 0.30 0.20 6.5 6.6 6.4 6.6 4.4 4.48 0.65 BSC 8˚ 0.60 0. inch MIN. TYP. 0.002 0.004 0.031 0.039 0.007 0.004 0.252 0.256 0.244 0.252 0.169 0.173 0.0256 BSC 0˚ 0.018 0.024 ...

Page 9

... Tape & Reel SO-20 MECHANICAL DATA DIM. MIN 12 10.8 Bo 13.2 Ko 3.1 Po 3.9 P 11.9 mm. TYP MAX. 330 13.2 0.504 0.795 2.362 30.4 11 0.425 13.4 0.520 3.3 0.122 4.1 0.153 12.1 0.468 74LVX541 inch MIN. TYP. MAX. 12.992 0.519 1.197 0.433 0.528 0.130 0.161 0.476 9/12 ...

Page 10

... Tape & Reel TSSOP20 MECHANICAL DATA DIM. MIN 12 6.8 Bo 6.9 Ko 1.7 Po 3.9 P 11.9 10/12 mm. TYP MAX. 330 13.2 0.504 0.795 2.362 22.4 7 0.268 7.1 0.272 1.9 0.067 4.1 0.153 12.1 0.468 inch MIN. TYP. MAX. 12.992 0.519 0.882 0.276 0.280 0.075 0.161 0.476 ...

Page 11

... Table 10: Revision History Date Revision 27-Aug-2004 2 Description of Changes Ordering Codes Revision - pag. 1. 74LVX541 11/12 ...

Page 12

... Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice ...

Related keywords