74lv175db NXP Semiconductors, 74lv175db Datasheet - Page 6

no-image

74lv175db

Manufacturer Part Number
74lv175db
Description
74lv175 Quad D-type Flip-flop With Reset; Positive-edge Trigger
Manufacturer
NXP Semiconductors
Datasheet
1. Unless otherwise stated, all typical values are measured at T
2. Typical values are measured at V
Philips Semiconductors
AC CHARACTERISTICS
GND = 0V; t
NOTES:
1998 May 20
SYMBOL
t
t
t
t
PHL/
PHL/
Quad D-type flip-flop with reset; positive-edge trigger
f
t
t
max
rem
t
t
t
t
su
t
t
w
w
/
/
h
t
t
t
t
PLH
PLH
r
= t
Propagation delay
CP to Q
Propagation delay
MR to Q
C
Clock pulse width
HIGH or LOW
HIGH or LOW
Master reset pulse
width LOW
width LOW
Removal time
MR to CP
Set-up time
D
Hold time
D
Maximum clock
pulse frequency
f
ulse frequency
n
n
PARAMETER
to CP
to CP
2.5ns; C
g
g
n,
n,
Q
Q
n
n
L
= 50pF; R
y
y
CC
L
WAVEFORM
= 3.3 V.
= 1KW
Figures 1
Figures 1
Figures 2
Figures 2
Figures 1
Figures 2
Figures 2
Figures 2
Figures 3
Figures 3
Figures 3
Figures 3
Figures 1
CONDITION
CONDITION
amb
3.0 to 3.6
3.0 to 3.6
3.0 to 3.6
3.0 to 3.6
3.0 to 3.6
3.0 to 3.6
3.0 to 3.6
3.0 to 3.6
V
CC
= 25 C.
1.2
2.0
2.7
1.2
2.0
2.7
2.0
2.7
2.0
2.7
1.2
2.0
2.7
1.2
2.0
2.7
1.2
2.0
2.7
2.0
2.7
(V)
6
MIN
34
25
20
34
25
20
22
16
13
14
19
24
5
5
5
5
5
5
–40 to +85 C
TYP
–12
100
–60
–20
–15
19
17
70
34
25
90
31
23
14
10
14
–5
–1
40
58
8
7
1
0
9
5
2
2
0
2
2
2
2
2
2
2
2
1
LIMITS
MAX
65
48
38
58
43
34
–40 to +125 C
MIN
41
30
24
41
30
24
26
19
15
12
16
20
5
5
5
5
5
5
Product specification
74LV175
MAX
77
56
45
70
51
41
UNIT
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

Related parts for 74lv175db