74lvq240scx-nl Fairchild Semiconductor, 74lvq240scx-nl Datasheet

no-image

74lvq240scx-nl

Manufacturer Part Number
74lvq240scx-nl
Description
74lvq240 Low Voltage Octal Buffer/line Driver With 3-state Outputs
Manufacturer
Fairchild Semiconductor
Datasheet
© 2001 Fairchild Semiconductor Corporation
74LVQ240SC
74LVQ240SJ
74LVQ240QSC
74LVQ240
Low Voltage Octal Buffer/Line Driver
with 3-STATE Outputs
General Description
The LVQ240 is an inverting octal buffer and line driver
designed to be employed as a memory address driver,
clock driver and bus oriented transmitter or receiver which
provides improved PC board density.
Ordering Code:
Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbol
Connection Diagram
Order Number
Package Number
MQA20
IEEE/IEC
M20D
M20B
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
20-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150" Wide
DS011611
Features
Pin Descriptions
Truth Tables
H
X
OE
I
O
Ideal for low power/low noise 3.3V applications
Implements patented EMI reduction circuitry
Available in SOIC JEDEC, SOIC EIAJ, and QSOP pack-
ages
Guaranteed simultaneous switching noise level and
dynamic threshold performance
Improved latch-up immunity
Guaranteed incident wave switching into 75
4 kV minimum ESD immunity
0
Immaterial
HIGH Voltage Level
–I
0
–O
Pin Names
1
7
, OE
OE
OE
Package Description
7
H
H
L
L
L
L
1
2
2
Inputs
Inputs
3-STATE Output Enable Inputs
Inputs
Outputs
I
I
H
X
H
X
L
L
L
Z
n
n
LOW Voltage Level
High Impedance
June 1993
Revised June 2001
Description
(Pins 12, 14, 16, 18)
(Pins 3, 5, 7, 9)
www.fairchildsemi.com
Outputs
Outputs
H
H
L
Z
L
Z

Related parts for 74lvq240scx-nl

74lvq240scx-nl Summary of contents

Page 1

... Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. Logic Symbol IEEE/IEC Connection Diagram © 2001 Fairchild Semiconductor Corporation Features Ideal for low power/low noise 3.3V applications Implements patented EMI reduction circuitry Available in SOIC JEDEC, SOIC EIAJ, and QSOP pack- ...

Page 2

Absolute Maximum Ratings Supply Voltage ( Input Diode Current ( 0. 0. Input Voltage ( Output Diode Current ( ...

Page 3

AC Electrical Characteristics Symbol Parameter t Propagation Delay PHL t Data to Output PLH t Output Enable Time PZL t PZH t Output Disable Time PHZ t PLZ t Output to Output Skew OSHL t Data to Output (Note 9) ...

Page 4

Physical Dimensions inches (millimeters) unless otherwise noted 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide www.fairchildsemi.com Package Number M20B 4 ...

Page 5

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M20D 5 www.fairchildsemi.com ...

Page 6

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150" Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the ...

Related keywords