m41t94 STMicroelectronics, m41t94 Datasheet - Page 12

• Manufacturer Part Number: m41t94
• Description: Serial Real-time Clock With 44 Bytes Nvram And Reset
• Manufacturer: STMicroelectronics

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Operation
The M41T94 clock operates as a slave device on the SPI serial bus. Each memory device is
accessed by a simple serial interface that is SPI bus compatible. The bus signals are SCL,
SDI and SDO (see
the Chip Enable input (E) is held low. All instructions, addresses and data are shifted serially
in and out of the chip. The most significant bit is presented first, with the data input (SDI)
sampled on the first rising edge of the clock (SCL) after the Chip Enable (E) goes low. The
64 bytes contained in the device can then be accessed sequentially in the following order:
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The M41T94 clock continually monitors V
fall below V
counter. Inputs to the device will not be recognized at this time to prevent erroneous data
from being written to the device from a an out-of-tolerance system. When V
V
current mode of operation to conserve battery life. As system power returns and V
above V
Write protection continues until V
information on Battery Storage Life refer to Application Note AN1012.
SO
, the device automatically switches over to the battery and powers down into an ultra low
1
2
3
4
5
6
7
8
9
10
11
17
20
21
st
nd
rd
th
th
th
th
th
th
th
th
th
th
st
byte: tenths/hundredths of a second register
byte: century/hours register
byte: day register
byte: date register
byte: month register
byte: year register
byte: control register
byte: minutes register
SO
byte: seconds register
- 64
byte: watchdog register
- 16
- 19
byte: square wave register
, the battery is disconnected, and the power supply is switched to external V
PFD
th
th
th
, the device terminates an access in progress and resets the device address
bytes: user RAM
bytes: Alarm registers
bytes: reserved
Table 1 on page 8
CC
reaches V
and
CC
Figure 5 on page
for an out-of tolerance condition. Should V
PFD
(min) plus t
9). The device is selected when
REC
(min). For more
CC
falls below
CC
rises
CC
CC
.