max5072etjt Maxim Integrated Products, Inc., max5072etjt Datasheet - Page 9

• Manufacturer Part Number: max5072etjt
• Description: Max5072 2.2mhz, Dual-output Buck Or Boost Converter With Por And Power-fail Output
• Manufacturer: Maxim Integrated Products, Inc.

(V+ = VL = 5.2V, T
PIN
3, 4
10
1
2
5
6
7
8
9
BST2/VDD2
Converter with POR and Power-Fail Output
CLKOUT
DRAIN2
COMP2
NAME
SYNC
EN2
PFO
FB2
PFI
A
= +25°C, unless otherwise noted.)
_______________________________________________________________________________________
MANUAL RESET (MR)
Clock Output. CLKOUT is 45° phase-shifted with respect to converter 2 (SOURCE2, Figure 3). Connect
CLKOUT (master) to the SYNC of a second MAX5072 (slave) for a four-phase converter.
Buck Converter Operation—Bootstrap Flying-Capacitor Connection for Converter 2. Connect BST2/VDD2
to an external ceramic capacitor and diode according to the Standard Application Circuit (Figure 1).
Boost Converter Operation—Driver Bypass Capacitor Connection. Connect a low-ESR 0.1µF ceramic
capacitor from BST2/VDD2 to PGND (Figure 9).
Connection to Converter 2 Internal MOSFET Drain. Buck converter operation—use the MOSFET as a
high-side switch and connect DRAIN2 to the input supply. Boost converter operation—use the MOSFET
as a low-side switch and connect DRAIN2 to the inductor and diode junction (Figure 9).
Acti ve- H i g h E nab l e Inp ut for C onver ter 2. D r i ve E N 2 l ow to shut d ow n conver ter 2, d r i ve E N 2 hi g h for nor m al
op er ati on. U se E N 2 i n conj uncti on w i th E N 1 for sup p l y seq uenci ng . C onnect to V L for al w ays- on op er ati on.
Feed b ack Inp ut for C onver ter 2. C onnect FB2 to a r esi sti ve d i vi d er b etw een conver ter 2’ s outp ut and S GN D
to ad j ust the outp ut vol tag e. To set the outp ut vol tag e b el ow 0.8V , connect FB2 to a r esi sti ve vol tag e- d i vi d er
fr om BY P AS S to r eg ul ator 2’ s outp ut ( Fi g ur e 6) . S ee the S etti ng the O utp ut V ol tag e secti on.
Compensation Connection for Converter 2. See the Compensation section to compensate converter 2’s
control loop.
D yi ng Gasp C om p ar ator Outp ut. The P FO op en- d r ai n outp ut g oes l ow w hen P FI fal l s b el ow the 0.78V r efer ence.
External Clock Synchronization Input. Connect SYNC to a 400kHz to 4400kHz clock to synchronize the
switching frequency with the system clock. Each converter frequency is one half the frequency applied to
SYNC. Connect SYNC to SGND when not used.
Dying Gasp Comparator Noninverting Input. Connect a resistor-divider from the input supply to PFI. PFI
forces PFO low when V
uncommitted comparator and can be used for any protection feature such as OVP or POWER-GOOD.
100ms/div
2.2MHz, Dual-Output Buck or Boost
MAX5072 toc23
Typical Operating Characteristics (continued)
PFI
MR
5V/div
V
5V/div
V
5V/div
RST
5V/div
OUT1
OUT2
falls below 0.78V. The PFI comparator has a 20mV (typ) hysteresis. This is an
= 3.3V
= 2.5V
FUNCTION
FOUR-PHASE OPERATION
(SEE FIGURE 3)
400ns/div
MAX5072 toc24
Pin Description
0V
0V
0V
SOURCE 2
(SLAVE)
SOURCE 1
(MASTER)
SOURCE 2
(MASTER)
SOURCE 1
(SLAVE)
9