adv7611 Analog Devices, Inc., adv7611 Datasheet - Page 10

• Manufacturer Part Number: adv7611
• Description: Low Power 165 Mhz Hdmi Receiver Adv7611
• Manufacturer: Analog Devices, Inc.

ADV7611
Pin
No.
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
Mnemonic
DVDD
LLC
P15
P14
P13
P12
P11
P10
P9
P8
DVDDIO
P7
P6
P5
P4
P3
DVDD
P2
P1
P0
DVDDIO
DE
HS
VS/FIELD/ALSB
AP
SCLK/INT2
LRCLK
MCLK/INT2
DVDD
SCL
SDA
INT1
RESET
PVDD
XTALP
XTALN
DVDD
CEC
DDCA_SCL
DDCA_SDA
RXA_5V
Type
Power
Digital video output
Digital video output
Digital video output
Digital video output
Digital video output
Digital video output
Digital video output
Digital video output
Digital video output
Power
Digital video output
Digital video output
Digital video output
Digital video output
Digital video output
Power
Digital video output
Digital video output
Digital video output
Power
Miscellaneous digital
Digital video output
Digital input/output
Miscellaneous digital
Miscellaneous digital
Miscellaneous digital
Miscellaneous digital
Power
Miscellaneous digital
Miscellaneous digital
Miscellaneous digital
Miscellaneous digital
Power
Miscellaneous analog
Miscellaneous analog
Power
Digital input/output
HDMI input
HDMI input
HDMI input
Description
Digital Core Supply Voltage (1.8 V).
Line-Locked Output Clock for the Pixel Data (Range is 13.5 MHz to 162.5 MHz).
Video Pixel Output Port.
Video Pixel Output Port.
Video Pixel Output Port.
Video Pixel Output Port.
Video Pixel Output Port.
Video Pixel Output Port.
Video Pixel Output Port.
Video Pixel Output Port.
Digital I/O Supply Voltage (3.3 V).
Video Pixel Output Port.
Video Pixel Output Port.
Video Pixel Output Port.
Video Pixel Output Port.
Video Pixel Output Port.
Digital Core Supply Voltage (1.8 V).
Video Pixel Output Port.
Video Pixel Output Port.
Video Pixel Output Port.
Digital I/O Supply Voltage (3.3 V).
DE (data enable) is a signal that indicates active pixel data.
HS is a horizontal synchronization output signal.
VS is a vertical synchronization output signal. FIELD is a field synchronization output
signal in all interlaced video modes. VS or FIELD can be configured for this pin. The ALSB
allows selection of the I
Audio Output Pin. Pin can be configured to output S/PDIF digital audio output (S/PDIF)
or time-division-multiplexed I
A dual function pin that can be configured to output an audio serial clock or an Interrupt
2 signal.
Audio Left/Right Clock.
A dual function pin that can be configured to output an audio master clock or an
Interrupt 2 signal.
Digital Core Supply Voltage (1.8 V).
I
I
Interrupt. This pin can be active low or active high. When status bits change, this pin is
triggered. The events that trigger an interrupt are under user configuration.
System Reset Input. Active low. A minimum low reset pulse width of 5 ms is required to
reset the ADV7611 circuitry.
PLL Supply Voltage (1.8 V).
Input Pin for 28.63636 MHz Crystal or an External 1.8 V, 28.63636 MHz Clock Oscillator
Source to Clock the ADV7611.
Crystal Input. Input pin for 28.63636 MHz crystal.
Digital Core Supply Voltage (1.8 V).
Consumer Electronic Control Channel.
HDCP Slave Serial Clock Port A. DDCA_SCL is a 3.3 V input that is 5 V tolerant.
HDCP Slave Serial Data Port A. DDCA_SDA is a 3.3 V input that is 5 V tolerant.
5 V Detect Pin for Port A in the HDMI Interface.
2
2
C Port Serial Clock Input. SCL is the clock line for the control port.
C Port Serial Data Input/Output Pin. SDA is the data line for the control port.
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2
C address.
2
S.