adv7619 Analog Devices, Inc., adv7619 Datasheet
adv7619
Available stocks
Related parts for adv7619
adv7619 Summary of contents
Page 1
... DDC DSD HBR MCLK SCLK LRCLK Figure 1. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 Fax: 781.461.3113 Dual Port, Xpressview, 3 GHz HDMI Receiver ADV7619 HS VS/FIELD DE CLK 36-/48-BIT OUTPUT BUS AUDIO OUTPUT MCLK SCLK www.analog.com ©2011 Analog Devices, Inc. All rights reserved. ...
Page 2
... ADV7619 TABLE OF CONTENTS Features .............................................................................................. 1 Applications ....................................................................................... 1 Functional Block Diagram .............................................................. 1 General Description ......................................................................... 3 Detailed Functional Block Diagram .............................................. 3 Specifications ..................................................................................... 4 Electrical Characteristics ............................................................. 4 2 Data and I C Timing Characteristics ......................................... 6 Absolute Maximum Ratings ............................................................ 9 Package Thermal Performance ................................................... 9 ESD Caution .................................................................................. 9 Pin Configuration and Function Descriptions ........................... 10 Preliminary Technical Data Power Supply Recommendations ................................................. 14 ...
Page 3
... The HDMI receiver also includes an integrated program- mable equalizer that ensures robust operation of the interface with long cables. The ADV7619 offers a flexible audio output port for audio data extraction from the HDMI stream. HDMI audio formats, includ- ing SACD via DSD and HBR, are supported by the ADV7619. ...
Page 4
... ADV7619 SPECIFICATIONS ELECTRICAL CHARACTERISTICS DVDD = 1. 1.89 V, DVDDIO = 3. 3.46 V, PVDD = 1. 1.89 V, TVDD = 3. 3.46 V, CVDD = 1. 1.89 V, operating temperature range, unless otherwise noted. Table 1. Parameter 1 DIGITAL INPUTS Input High Voltage Input Low Voltage Input Current Input Capacitance 1 DIGITAL INPUTS (5 V TOLERANT) Input High Voltage ...
Page 5
... Nominal 2 inputs On 1080p60, 36 bits Off SMPTE 20°C Nominal N/A N/A N/A N/A N/A 20°C Nominal Power-Down Mode 0 (IO map, Register 0x0C = 0x62) Ring oscillator powered down (HDMI map, Register 0x48 = 0x01) DDC pads powered off (HDMI map, Register 0x73 = 0x03) Rev. PrB | Page ADV7619 ...
Page 6
... ADV7619 2 DATA AND I C TIMING CHARACTERISTICS Table 3. Parameter CLOCK AND CRYSTAL Crystal Frequency, XTAL Crystal Frequency Stability LLC Frequency Range PORTS SCL Frequency 1 SCL Minimum Pulse Width High 1 SCL Minimum Pulse Width Low 1 Start Condition Hold Time 1 Start Condition Setup Time ...
Page 7
... Figure Timing Figure 4. Pixel Port and Control SDR Output Timing MSB MSB – MSB MSB – MSB 2 Figure Timing Rev. PrB | Page LSB t 20 ADV7619 ...
Page 8
... ADV7619 t 21 SCLK LRCLK t 24 I2S_TDM LEFT-JUSTIFIED MODE I2S_TDM MODE I2S_TDM RIGHT-JUSTIFIED MODE NOTES 1. THE LRCLK SIGNAL IS AVAILABLE ON THE AP5 PIN MSB MSB – MSB MSB – MSB Figure 6. TDM Serial Timing Rev. PrB | Page ...
Page 9
... PACKAGE THERMAL PERFORMANCE To reduce power consumption when using the ADV7619, the user is advised to turn off the unused sections of the part. Due to PCB metal variation and, therefore, variation in PCB heat conductivity, the value of θ ...
Page 10
... RXB_2+ 30 CVDD 31 GND 32 NOTES CONNECT. DO NOT CONNECT TO THIS PIN. 2. CONNECT THE EXPOSED PAD (PIN 0) ON THE BOTTOM OF THE PACKAGE TO GROUND. Preliminary Technical Data ADV7619 TOP VIEW (Not to Scale) Figure 7. Pin Configuration Rev. PrB | Page VS/FIELD/ALSB ...
Page 11
... Video Pixel Output Port. Video Pixel Output Port. Video Pixel Output Port. Video Pixel Output Port. Video Pixel Output Port. Video Pixel Output Port. Video Pixel Output Port. Video Pixel Output Port. Video Pixel Output Port. Rev. PrB | Page ADV7619 ...
Page 12
... ADV7619 Pin No. Mnemonic Type 52 DVDDIO Power 53 DVDD Power 54 P31 Digital video output 55 P30 Digital video output 56 P29 Digital video output 57 P28 Digital video output 58 P27 Digital video output 59 P26 Digital video output 60 P25 Digital video output 61 P24 Digital video output 62 LLC ...
Page 13
... Interrupt. This pin can be active low or active high. When status bits change, this pin is triggered. The events that trigger an interrupt are user configurable. System Reset Input. Active low. A minimum low reset pulse width required to reset the ADV7619 circuitry. Chip Select. Pulling this pin up causes the I PLL Supply Voltage (1.8 V). ...
Page 14
... V supplies first, followed by the 1.8 V supplies. RESET should be held low while the supplies are powered up. Alternatively, the ADV7619 can be powered up by asserting all supplies simultaneously. In this case, care must be taken while the supplies are being established to ensure that a lower rated supply does not go above a higher rated supply level ...
Page 15
... CEC controller COMPONENT PROCESSOR (CP) The ADV7619 has two any-to-any, 3 × 3 color space conversion (CSC) matrices. The first CSC block is placed in front of the CP section. The second CSC block is placed at the back of the CP section. Each CSC enables YPrPb-to-RGB and RGB-to-YCrCb conversions ...
Page 16
... UG-237. LRCLK SCLK AP1/I2S_TDM The ADV7619 is provided in a 128-pin × 14 mm, RoHS-compliant TQFP_EP package and is specified over the 0°C to 70°C temperature range. For more detailed product information about the ADV7619, contact your local Analog Devices, Inc., sales office. ...
Page 17
... Preliminary Technical Data PIXEL INPUT/OUTPUT FORMATTING The output section of the ADV7619 is highly flexible. The pixel output bus can support up to 36-bit 4:4:4 YCrCb or 36-bit 4:4:4 RGB. For resolutions higher than 1080p, the pixel output bus supports two 24-bit 4:4:4 RGB/YCrCb. For resolutions up to 1080p, the pixel data supports both single data rate (SDR) and double data rate (DDR) modes. • ...
Page 18
... ADV7619 Table 7. SDR 4:2:2 Output Modes (8-/10-/12-Bit) OP_FORMAT_SEL[7:0] 0x00 8-Bit SDR ITU-R BT.656 Pixel Output Mode 0 P47 High-Z P46 High-Z P45 High-Z P44 High-Z P43 High-Z P42 High-Z P41 High-Z P40 High-Z P39 High-Z P38 High-Z P37 High-Z P36 High-Z P35 High-Z ...
Page 19
... Cb5, Cr5 Cb2, Cr2 Cb4, Cr4 Cb1, Cr1 Cb3, Cr3 Cb0, Cr0 Cb2, Cr2 High-Z Cb1, Cr1 High-Z Cb0, Cr0 Rev. PrB | Page ADV7619 0x86 0x8A 24-Bit SDR 24-Bit SDR ITU-R BT.656 ITU-R BT.656 Mode 1 Mode 2 High-Z High-Z High-Z High-Z ...
Page 20
... ADV7619 Table 9. SDR 4:4:4 Output Modes OP_FORMAT_SEL[7:0] 0x40 24-Bit SDR Pixel Output Mode 0 P47 High-Z P46 High-Z P45 High-Z P44 High-Z P43 High-Z P42 High-Z P41 High-Z P40 High-Z P39 High-Z P38 High-Z P37 High-Z P36 High-Z P35 R7 P34 R6 P33 R5 P32 R4 P31 ...
Page 21
... High-Z High-Z High-Z High-Z High-Z High-Z High-Z High-Z High-Z High-Z High-Z High-Z High-Z High-Z High-Z High-Z Rev. PrB | Page ADV7619 0x22 12-Bit DDR ITU-656, Mode 0 Clock Rise Clock Fall High-Z High-Z High-Z High-Z High-Z High-Z High-Z High-Z High-Z High-Z High-Z ...
Page 22
... ADV7619 Table 11. DDR 4:4:4 Output Modes 0x60 OP_FORMAT_SEL[7:0] 24-Bit DDR, Mode 0 Pixel Output Clock Rise P47 High-Z P46 High-Z P45 High-Z P44 High-Z P43 High-Z P42 High-Z P41 High-Z P40 High-Z P39 High-Z P38 High-Z P37 High-Z P36 High-Z P35 R7-0 P34 R6-0 P33 ...
Page 23
... Y11-1 Y8-1 Y10-1 Y7-1 Y9-1 Y6-1 Y8-1 Y5-1 Y7-1 Y4-1 Y6-1 Y3-1 Y5-1 Y2-1 Y4-1 Y1-1 Y3-1 Y0-1 Y2-1 High-Z Y1-1 High-Z Y0-1 Cr9-0 Cr11-0 Cr8-0 Cr10-0 Cr7-0 Cr9-0 Cr6-0 Cr8-0 Cr5-0 Cr7-0 Cr4-0 Cr6-0 Cr3-0 Cr5-0 Cr2-0 Cr4-0 Cr1-0 Cr3-0 Cr0-0 Cr2-0 High-Z Cr1-0 High-Z Cr0-0 Rev. PrB | Page × SDR 4:4:4 Interleaved 0x54 2 × 24-Bit Mode 0 G7-0 G6-0 G5-0 G4-0 G3-0 G2-0 G1-0 G0-0 B7-0 B6-0 B5-0 B4-0 B3-0 B2-0 B1-0 B0-0 R7-0 R6-0 R5-0 R4-0 R3-0 R2-0 R1-0 R0-0 G7-1 G6-1 G5-1 G4-1 G3-1 G2-1 G1-1 G0-1 B7-1 B6-1 B5-1 B4-1 B3-1 B2-1 B1-1 B0-1 R7-1 R6-1 R5-1 R4-1 R3-1 R2-1 R1-1 R0-1 ADV7619 ...
Page 24
... COPLANARITY VIEW A ROTATED 90° CCW ORDERING GUIDE 1 Model Temperature Range ADV7619KSVZ 0°C to 70° RoHS Compliant Part refers to a communications protocol originally developed by Philips Semiconductors (now NXP Semiconductors). HDMI, the HDMI Logo, and High-Definition Multimedia Interface are trademarks or registered trademarks of HDMI Licensing LLC in the United States and other countries. ...