dsp56002fc80 Freescale Semiconductor, Inc, dsp56002fc80 Datasheet - Page 50

• Manufacturer Part Number: dsp56002fc80
• Description: 24-bit Digital Signal Processor
• Manufacturer: Freescale Semiconductor, Inc

No.
115 Delay from BR
116 Delay from BR
Specifications
External Bus Asynchronous Timing
EXTERNAL BUS ASYNCHRONOUS TIMING
C
WS = Number of Wait States (0 to 15), as determined by BCR register
Capacitance Derating: The DSP56002 External Bus Timing Specifications are designed and
tested at the maximum capacitive load of 50 pF, including stray capacitance. Typically, the drive
capability of the External Bus pins (A0–A15, D0–D23, PS, DS, RD, WR, X/Y, EXTP) derates
linearly at 1 ns per 12 pF of additional capacitance from 50 pF to 250 pF of loading. Port B and C
pins (HI, SCI, SSI, and Timer) derate linearly at 1 ns per 5 pF of additional capacitance from 50
pF to 250 pF of loading. Active low lines should be “pulled up” in a manner consistent with the
AC and DC specifications.
2-24
L
Assertion to BG
Assertion
Deassertion to BG
Deassertion
= 50 pF + 2 TTL loads
•
•
•
•
•
Characteristics
With no
external access
from the DSP
During external
read or write
access
During external
read-modify-
write access
During Stop
mode—
external bus
will not be
released and
BG will not go
low
During Wait
mode
Table 2-12 External Bus Asynchronous Timing
T
T
2T
C
C
Min
2T
T
T
+ T
+ T
C
H
H
C
+
H
H
40 MHz
(2T
(T
4T
T
4T
6T
C
4T
C
C
C
DSP56002/D, Rev. 3
+ T
C
C
+ T
C
Max
WS) + 14
+ T
+ T
14
WS) +14
+ 12.5
H
H
H
H
+ 15
+ 14
+
+
T
T
2T
C
C
Min
2T
T
T
+ T
+ T
C
H
H
C
+
H
H
66 MHz
(2T
(T
4T
T
4T
6T
C
4T
C
C
C
+ T
C
C
+ T
C
Max
WS) + 14
+ T
+ T
14
WS) +14
+ 12.5
H
H
H
H
+ 15
+ 14
+
+
T
T
2T
C
C
Min
2T
T
T
+ T
+ T
C
H
H
C
+
H
H
80 MHz
(2T
(T
4T
T
4T
6T
C
4T
C
C
C
MOTOROLA
+ T
C
C
+ T
C
Max
WS) + 14
+ T
+ T
14
WS) +14
+ 12.5
H
H
H
H
+ 15
+ 14
+
+
Unit
ns
ns
ns
ns
ns
ns