dp83820 National Semiconductor Corporation, dp83820 Datasheet

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dp83820

Manufacturer Part Number
dp83820
Description
10/100/1000 Mb/s Pci Ethernet Network Interface Controller
Manufacturer
National Semiconductor Corporation
Datasheet

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© 2001 National Semiconductor Corporation
DP83820
General Description
DP83820 is a single-chip 10/100/1000 Mb/s Ethernet
Controller for the PCI bus. It is targeted at high-
performance adapter cards and mother boards. The
DP83820 fully implements the V2.2 66 MHz, 64-bit PCI bus
interface for host communications with power management
support. Packet descriptors and data are transferred via
bus-mastering, reducing the burden on the host CPU. The
DP83820 can support full duplex 10/100/1000 Mb/s
transmission and reception.
Features
— IEEE 802.3 Compliant, 66/33 Mhz, 64/32-bit PCI V2.2
— Flexible, programmable Bus master - burst sizes of up to
— BIU compliant with PC 97 and PC 98 Hardware Design
— Wake on LAN (WOL) support compliant with PC98,
— GMII/MII provides IEEE 802.3 standard interface to
— Ten-Bit Interface (TBI) for support of 1000BASE-X
System Diagram
MAC/BIU supports data rates from 1 Mb/s to 1000 Mb/s.
This allows support for traditional 10 Mb/s Ethernet, 100
Mb/s Fast Ethernet, as well as 1000 Mb/s Gigabit
Ethernet.
256 dwords (1024 bytes)
Guides, PC 99 Hardware Design Guide draft, ACPI v1.0,
PCI Power Management Specification v1, OnNow
Device
Specification - Network Device Class v1.0a
PC99, and OnNow, including directed packets, Magic
Packet with SecureOn, ARP packets, pattern match
packets, and Phy status change
support 10/100/1000 Mb/s physical layer devices
Class
PCI Bus
Power
10/100/1000 Mb/s PCI Ethernet Network Interface
Controller
Management
DP83820
Boot ROM (optional)
EEPROM (optional)
Reference
GMII
MII
— Virtual LAN (VLAN) and long frame support. VLAN tag
— 802.3x Full duplex flow control, including automatic
— IPv.4 checksum task off-loading. Supports checksum
— 802.1D and 802.1Q priority queueing support. Supports
— Extremely flexible Rx packet filtration including: single
— Statistics gathered for support of RFC 1213 (MIB II),
— Internal 8 KB Transmit and 32 KB Receive data FIFOs
— Supports Jumbo packets
— Serial EEPROM port with auto-load of configuration data
— Flash/PROM interface for remote boot support
— Full Duplex support for 10/100/1000 Mb/s data rates
— 208-pin PQFP package
— Low power CMOS design
— 3.3V powered I/Os with 5V tolerant inputs
— JTAG Boundary Scan supported
10/100/1000 Mb/s
insertion support for transmit packets. VLAN tag
detection and removal for receive packets
transmission of Pause frames based on Rx FIFO
thresholds
generation and verification of IP, TCP, and UDP headers
multiple priority queues in both transmit and receive
directions.
address perfect filter with MSb masking, broadcast,
2,048 entry multicast/unicast hash table, deep packet
pattern matching for up to 4 unique patterns.
RFC 1398 (Ether-like MIB), IEEE 802.3 LME, reducing
CPU overhead for management.
from EEPROM at power-on
PHY
PRELIMINARY
www.national.com
February 2001

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