mc33702 Freescale Semiconductor, Inc, mc33702 Datasheet - Page 14

• Manufacturer Part Number: mc33702
• Description: 3.0 A Switch-mode Power Supply With Linear Regulator
• Manufacturer: Freescale Semiconductor, Inc

the boost regulator output capacitor reaches its regulation limit,
the low-side switch is turned off until the output voltage falls
below the regulation limit again.
Oscillator
the buck regulator. The frequency of the oscillator can be
adjusted between 200 kHz and 400 kHz by an optional external
resistor R
circuit to ground. See
output when the CLKSEL pin is left open or it can be used as a
synchronization input when the CLKSEL pin is grounded. The
oscillator output signal is a square wave logic signal with
50 percent duty cycle, 180 degrees out-of-phase with the
internal clock signal. This allows opposite phase
synchronization of two 3370x devices.
(CLKSEL pin grounded), the external resistor R
the chart in
slope compensation ramp to the external clock. Operation is
only recommended between 200 kHz and 400 kHz. The
supplied synchronization signal does not need to be 50 percent
duty cycle. Minimum pulse width is 300 ns.
Low Dropout Linear Regulator (LDO)
of supplying a 1.0 A output current. It has a current limit with
retry capability. When the voltage measured across the current
sense resistor reaches the 45 mV threshold, the control circuit
limits the current for 1.0 ms and if the overcurrent condition still
exists the linear regulator is turned off. At the same time the
overcurrent condition is detected, the Retry Timer starts to time
out. When the timer expires after 100 ms, the LDO tries to
power up again for 1.0 ms, repeatedly checking for the
overcurrent condition. The current limit of the LDO can be set
by using the following formula:
Where R
between the CS pin and the LDO pin output (see
detect the overcurrent condition by tying the current sense pin
CS to the V
is sensed by saturation of the linear regulator driver buffer.
an external resistor divider connected to the feedback control
pin LFB. The linear regulator output voltage can be adjusted in
the range of 0.8 V to 5.0 V, but the LDO output voltage is always
lower than the input voltage to the regulator. Power-up, power-
down, and fault management are coordinated with the
switching regulator.
Thermal Shutdown
shutdown control. When the Q4 temperature exceeds the
33702
14
A 300 kHz (default) oscillator sets the switching frequency of
The CLKSYN pin can be configured either as an oscillator
When the CLKSYN pin is used as synchronization input
The adjustable low dropout linear regulator (LDO) is capable
When no current sense resistor is used, it is still possible to
The output voltage of the LDO can be adjusted by means of
The LDO pull-down FET Q4 has an independent thermal
S
F
is the LDO current sense resistor, connected
connected from the FREQ pin of the integrated
Figure 4
BST
voltage. In this case, the overcurrent condition
should be used to synchronize the internal
Figure 4
I
LIM
= 45 mV/R
for frequency resistor selection.
S
Freescale Semiconductor, Inc.
For More Information On This Product,
F
chosen from
Figure
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20).
thermal shutdown limit, the Q4 will be turned off without
affecting the LDO operation.
Voltage Margining
through the I
adjustment of the Switcher V
V
range of ±7%. This feature allows for worst case system
validation; i.e., determining the design margin. Margining
details are described in the section entitled
beginning on page 19 of this datasheet.
RESET
circuit supervises both output voltages—the linear regulator
output V
either of these two regulators is out of regulation (high or low),
the
preventing erroneous resets. During power-up sequencing,
RESET
Reset Timer Power-Up Delay (RT)
delay between the time when the LDO and switcher outputs are
active and stable and the release of the
external resistor and capacitor are used to program the timer.
The power-up delay can be obtained by using the following
formula:
Where R
Reset Timer programming capacitor, both connected in parallel
from RT to ground.
accuracy if R
Watchdog Timer
It is possible to select either window watchdog or time-out
watchdog operation, as illustrated in
activated via I
command byte, thus determining watchdog operation (window
or time-out) and period duration (refer to
the watchdog is cleared by receiving a new Watchdog
Programming command through the I
timer is reset and the new time-out period begins. If the
watchdog time expires, the
for a time determined by the RC components of the RT timer
plus 10 ms. After a watchdog time-out, the function is no longer
active.
LDO
The 33702 includes a voltage margining feature accessed
The
The Reset Timer Power-Up Delay (RT) pin is used to set the
Note Observe the maximum C
A watchdog function is available via I
Watchdog time-out starts when the watchdog function is
RESET
MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA
. Each can be adjusted up and down in 1% steps to a
RESET
is held low until the Reset Timer times out.
LDO
t
is the Reset Timer programming resistor and C
pin is pulled low. There is a 20 s delay filter
and the switching regulator output V
2
t
C bus. Voltage margining allows for independent
2
is less than 10 k .
pin is an open drain output. The Reset Control
C bus sending a Watchdog Programming
T
D
= 10 ms + R
RESET
OUT
voltage and the linear output
t
value and expect reduced
will become active (LOW)
Figure 9
2
t
C
C bus, the watchdog
2
t
C bus communication.
RESET
Table
I
2
C Bus
on page 15.
1, page 15). If
output. An
OUT
Operation,
. When
t
is the