adm697ar-reel Analog Devices, Inc., adm697ar-reel Datasheet - Page 5

• Manufacturer Part Number: adm697ar-reel
• Description: ?p Supervisor With Backup Battery Switchover, Adjustable Low Line Voltage Monitor, Adjustable Watchdog Timer, Low Line, Power Fail And Watchdog Status Outputs And 100ma Output Current
• Manufacturer: Analog Devices, Inc.

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CIRCUIT INFORMATION
Battery-Switchover Section (ADM696)
The battery switchover circuit compares V
input, and connects V
occurs when V
when V
20 mV of hysteresis prevents repeated rapid switching if V
falls very slowly or remains nearly equal to the battery voltage.
During normal operation with V
internally switched to V
switch. This switch has a typical on resistance of 1.5
supply up to 100 mA at the V
used to drive a RAM memory bank which may require instanta-
neous currents of greater than 100 mA. If this is the case, then
a bypass capacitor should be connected to V
will provide the peak current transients to the RAM. A capaci-
tance value of 0.1 F or greater may be used.
If the continuous output current requirement at V
100 mA or if a lower V
an external PNP pass transistor may be connected in parallel
with the internal transistor. The BATT ON output can directly
drive the base of the external transistor.
A 20
during battery backup. This MOSFET has very low input-to-
output differential (dropout voltage) at the low current levels
required for battery backup of CMOS RAM or other low power
CMOS circuitry. The supply current in battery backup is typi-
cally 0.6 A.
The ADM696 operates with battery voltages from 2.0 V to V
–0.3 V). High value capacitors, either standard electrolytic or
the farad-size double layer capacitors, can also be used for short-
term memory backup. A small charging current of typically
10 nA (0.1 A max) flows out of the V
rent is useful for maintaining rechargeable batteries in a fully
charged condition. This extends the life of the backup battery
by compensating for its self discharge current. Also note that
this current poses no problem when lithium batteries are used
for backup since the maximum charging current (0.1 A) is safe
for even the smallest lithium cells.
If the battery-switchover section is not used, V
connected to GND and V
V
BATT
V
CC
CC
MOSFET switch connects the V
Figure 1. Battery Switchover Schematic
700
mV
is 70 mV greater than V
GATE DRIVE
CC
100
mV
is 50 mV higher than V
OUT
CC
OUT
–V
OUT
to whichever is higher. Switchover
via an internal PMOS transistor
OUT
OUT
should be connected to V
INTERNAL
SHUT DOWN SIGNAL
WHEN
V
BATT
CC
voltage differential is desired,
terminal. V
BATT
higher than V
> (V
CC
BATT
as V
BATT
+ 0.7V)
BATT
CC
terminal. This cur-
CC
OUT
to the V
OUT
input to V
as V
BATT
rises. This
. The capacitor
BATT
V
BATT ON
(ADM691, ADM693,
ADM695, ADM696)
is normally
OUT
OUT
CC
should be
BATT
falls, and
, V
exceeds
and can
CC
OUT
CC
CC
.
is
CC
–5–
Low Line RESET OUTPUT
RESET is an active low output which provides a RESET signal
to the microprocessor whenever the Low Line Input (LL
below 1.3 V. The LL
power supply voltage. An internal timer holds RESET low for
50 ms after the voltage on LL
tended as a power-on RESET signal for the processor. It allows
time for the power supply and microprocessor to stabilize. On
power-down, the RESET output remains low with V
as 1 V. This ensures that the microprocessor is held in a stable
shutdown condition.
The LL
for enhanced noise immunity.
In addition to RESET, an active high RESET output is also
available. This is the complement of RESET and is useful for
processors requiring an active high RESET.
Watchdog Timer RESET
The watchdog timer circuit monitors the activity of the micro-
processor in order to check that it is not stalled in an indefinite
loop. An output line on the processor is used to toggle the
Watchdog Input (WDI) line. If this line is not toggled within
the selected timeout period, a RESET pulse is generated. The
ADM696/ADM697 may be configured for either a fixed
“short” 100 ms or a “long” 1.6 second timeout period or for an
adjustable timeout period. If the “short” period is selected some
systems may be unable to service the watchdog timer immedi-
ately after a reset, so a “long” timeout is automatically initiated
directly after a reset is issued. The watchdog timer is restarted
at the end of Reset, whether the Reset was caused by lack of ac-
tivity on WDI or by LL
The normal (short) timeout period becomes effective following
the first transition of WDI after RESET has gone inactive. The
watchdog timeout period restarts with each transition on the
WDI pin. To ensure that the watchdog timer does not time out,
either a high-to-low or low-to high transition on the WDI pin
must occur at or less than the minimum timeout period. If WDI
remains permanently either high or low, reset pulses will be is-
sued after each timeout period (1.6 s). The watchdog monitor
can be deactivated by floating the Watchdog Input (WDI) or by
connecting it to midsupply.
LOW LINE
RESET
LL
IN
IN
t
V1 = RESET VOLTAGE THRESHOLD LOW
V2 = RESET VOLTAGE THRESHOLD HIGH
HYSTERESIS = V2–V1
1
comparator has approximately 12 mV of hysteresis
= RESET TIME
Figure 2. Power-Fail Reset Timing
V2
t
1
IN
IN
input is normally used to monitor the
falling below the reset threshold.
V1
IN
rises above 1.3 V. This is in-
ADM696/ADM697
V2
t
1
CC
as low
IN
V1
) is