saf-xc836t-2fri Infineon Technologies Corporation, saf-xc836t-2fri Datasheet - Page 49

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saf-xc836t-2fri

Manufacturer Part Number
saf-xc836t-2fri
Description
8-bit Single-chip Microcontroller
Manufacturer
Infineon Technologies Corporation
Datasheet
3.3.5.2
Table 23
Table 23
Parameter
SCLK clock period
MRST delay from SCLK
MTSR set-up to SCLK
MTSR hold from SCLK
1) Not subject to production test, verified by design/characterisation.
2) T
Figure 16
Data Sheet
SSCmin
MTSR
MRST
SCLK
= T
provides the SSC slave mode timing in the XC835/836.
SSC Slave Mode Timing
CPU
1)
1)
1)
SSC Slave Mode Timing
SSC Slave Mode Timing
= 1/
f
CPU
. When
1)
This timing is based on the following setup : CON.PH = CON.PO = 0.
f
CPU
= 24 MHz,
t
1
t
Data Valid
2
t
0
Symbol
t
t
t
t
1)
0
1
2
3
= 166.7 ns. T
t
(Operating Conditions apply; CL = 50 pF)
0
44
t
3
SR
CC
SR
SR
CPU
is the CPU clock period.
Min.
4 * T
0
32
0
SSC
Limit Values
2)
Electrical Parameters
Max.
29
XC835/836
V1.0, 2010-09
Unit
ns
ns
ns
ns

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