sta011 STMicroelectronics, sta011 Datasheet - Page 16

• Manufacturer Part Number: sta011
• Description: L-band Rf Front-end For Digital Radio
• Manufacturer: STMicroelectronics

Functional description
4
4.1
4.2
4.3
4.4
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Functional description
Receiver chain
The receiver chain transforms the RF frequency signals to an IF signal at 1.84 MHz carrier
directly usable by the channel decoder. In front of the STA011 IC there it must be an external
LNA and a band-pass filter; the band-pass filter limits the input bandwidth and guarantees a
suitable rejection to the image frequency. The STA011 input stage is a LNA working in the
1452-1492 MHz band. The RF signal is down-converted, using an active mixer, to a first IF
of 115.244 MHz. The first LO is tunable with a frequency step of 460 KHz. The RF gain can
be reduced by 5dB by using an external trimmer/resistor connected between the PADJ1 and
PADJ2 pins, and it can also be reduced by 7.5dB (2.5 step) via thesoftware mode.
A 54 dB typical gain range is guaranteed at IF level. By connecting an external
trimmer/resistor to pins GADJ1, GADJ2, the IF output signal level can be decreased to the
desired value.
Moreover, the IF chain can be configured to have a fixed gain by fixing statically control volt-
ages on AGC1 and AGC2 pins (i.e. V(AGC1)=VCC and V(AGC2)=GND), and trimming the
gain by connecting an external resistor between GADJ1 and GADJ2.
By using an 800 Ohm resistor connected between GADJ1 and GADJ2, for example, a
typical 56 dBs IF static gain is obtained. The first IF signal, having a bandwidth of 2.5 MHz,
shaped by an external SAW filter, is down-converted to a second IF of 1.84 MHz.
A differential clock output of 14.72 MHz is available for use from the base-band.
Synthesizers, PLL, charge pump and VCOs
The first voltage controlled oscillator is controlled by an integrated PLL, and it's able to cover
a frequency range of 37 MHz with a step size of 460 KHz.
The second voltage controlled oscillator produces a fixed 8 x 117.08MHz frequency, scaled
by a divider by 8, and controlled by a second integrated PLL. Moreover, the 2nd PLL is able
cover the frequency range from 111.76MHz to 122.4MHz, suitable for anapplication test.
The other components of the first PLL synthesizer are a low frequency programmable
divider and a dual modulus prescaler; a fixed divider is instead used to synthesize the
second VCO fre-quency. Other internal programmable dividers are used to obtain the
comparison frequencies of both loops.
Channel selection is made through the I
Power supplies
The chip operates from an unregulated power supply of 2.7 to 3.3 Volts. All interface circuits
to the base-band chips are operate between these supplies unless otherwise specified.
Interface specification
All the interface voltage levels to the micro controller are referenced to the supply voltage of
the interface power supply (GND). The interface voltage levels are therefore fully compatible
with the base-band circuits. The digital levels are all CMOS threshold compatible with the
ex-ception of M_CLK1, M_CLK2 pins (ECL type). For a total solution all other interface
signals are also included.
2
CBUS interface, directly from the µP.
STA011