hmp8112 Harris Corporation, hmp8112 Datasheet
hmp8112
Related parts for hmp8112
hmp8112 Summary of contents
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... Harris Corporation 1998 HMP8112 NTSC/PAL Video Decoder Description The HMP8112 is a high quality, digital video, color decoder with internal A/D converters. The A/D function includes a 3:1 analog input mux, Sync Tip AGC, Black clamping and two 8-bit A/D Converters. The high quality A/D converters minimize pixel jitter and crosstalk ...
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... Functional Block Diagrams HMP8112 2 ...
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... Functional Block Diagrams GAIN_CTRL CCLAMP_CAP EXTERNAL ANTIALIASING FILTER CIN3 LIN0 LIN1 LIN2 LCLAMP_CAP LAGC_CAP HMP8112 (Continued) CLAMP DIGITAL COMPARATOR LOGIC AND CLAMP GAIN CONTROL - + EXTERNAL ANTIALIASING FILTER SOURCE L_OUT L_ADIN SELECT INPUT + MUX - DIGITAL COMPARATORS SYNC LEVEL AGC AND BLACK LEVEL ...
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... Functional Block Diagrams HMP8112 (Continued) VIDEO DECODER 4 ...
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... LOW PASS FILTER CHROMA C6 1 680 C1 C2 15pF 15pF C9 0. 0. C11 C10 0 HMP8112 (Continued) CONTROL REGISTERS .... 0 .... 1 .... . .... . . . CbCr[7:0] 25 Y[7: CR_CB7 LIN2 CRCB7 1 CR_CB6 CRCB6 6 49 CR_CB5 LIN1 CRCB5 48 CR_CB4 ...
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... LIN2 is used with CIN to interface an S-Video input. Three composite or two com- posite and one S-Video inputs can be applied to the HMP8112 at any one time. Control of the analog front end is selected by bits 2 and 1 of the Video Input Control Register. Anti-Aliasing Filter An external anti-alias fi ...
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... Color Separation, And Demodulation To separate the chrominance modulated color information from the baseband luminance signal line comb filter is employed. In NTSC signals the color information changes o phase 180 from one line to the next. This interleaves the HMP8112 0 HSYNC VIDEO INPUT DC RESTORE HAGC START TIME FIGURE 2B ...
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... VCR CYAN 44 headswitches and multipath noise. 75% CYAN The HMP8112 can use a main crystal (CLK) of 20MHz to 16 100% 0 30MHz. The crystal is used as a reference frequency for the Cr DATA internal phase locked loops. The ratio of the crystal fre- ...
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... PAL video source. An ideal NTSC source should have 262.5 lines per field and a PAL source should have 312.5 lines per field. The HMP8112 can detect a STANDARD Error that signals when the video received does not match the standard that was programmed into the Video Input Control Register. This ...
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... Video Adjustments The HMP8112 allows the user to vary such video parame- ters as Contrast, Brightness, Sharpness, Hue and Color Sat- uration. These adjustments can be made via the I interface. Contrast, brightness and sharpness are luminance controls ...
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... The HMP8112 contains a product ID register that can be used to identify the presence of a board during a Plug ’n Play detection software algorithm. The Product ID code is 12 and the register is the last register in the HMP8112 (1B Output Data Port Modes The HMP8112 can output data in 2 formats, an 8-bit Burst ) ...
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... YCbCr data in 8-bit format. The data is also 4:2:2 subsampled but will only contain the active video por- tion of the line. The HMP8112 uses an internal 32 deep fifo to handle latencies between the output sample rate and the CLK frequency. In this mode, the data is clocked out at the CLK rate and only clock frequencies of 24 ...
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... PIXEL 0 LINES 22-263.5 (LINES 23.5-310) FIGURE 15B. ACTIVE VIDEO REGIONS IN 16-BIT MODE t DLY CLK DVLDY ACTIVE Y[7-0] PIXEL DVLD HMP8112 2 C port is A 10K or smaller pullup resistor to V NOTE NOTE FIGURE 15A. OUTPUT TIMING 16-BIT MODE NTSC M, N PAL M < ...
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... These bits control the brightness adjustment to the luminance channel. The brightness Brightness Control adjustment value is a number that ranges from +63 to -64. This register is in the two’s complement format, where bit 6 is the sign bit. HMP8112 TABLE 6. VIDEO INPUT CONTROL DESTINATION ADDRESS = 00 H ...
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... These bits adjust the amplitude of vertical high frequency components in the luminance Frequency video signal. The attenuation or multiplication of the vertical high frequency components Enhancement is adjusted as shown below: Factor 00 = Multiply vertical high frequency components by 1 Reserved Reserved Zero out vertical high frequency components. HMP8112 DESTINATION ADDRESS = 02 H DESCRIPTION - ...
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... HAGC is programmable in CLK increments and has a fixed 1 clock delay following the falling edge of horizontal sync. This is the lower byte of the 10-bit word. TABLE 15. HORIZONTAL AGC START TIME REGISTER BIT NUMBER FUNCTION Not Used Write Ignored, Read 0’s. HMP8112 DESTINATION ADDRESS = 05 H DESCRIPTION - ...
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... HDRIVE pulse is set from the detection of horizontal sync in the video data. Time HDRIVE is programmable in CLK increments and has a fixed 1 clock delay following the falling edge of horizontal sync. This is the upper byte of the 10-bit word. HMP8112 DESTINATION ADDRESS = 09 H DESCRIPTION ...
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... DC RES pulse is set from the detection of horizontal sync in the video data. Time DC RES is programmable in CLK increments and has a fixed 1 clock delay following the falling edge of horizontal sync. This signal is used to run the GATE B pin of the A/D con- verter. This is the lower byte of the 10-bit word. HMP8112 DESTINATION ADDRESS = 0E H DESCRIPTION DESTINATION ADDRESS = 0F ...
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... When “1”, Square pixel output is selected, when “0” ITU-R BT601 output rate is selected. BT601 Select Output Field Control These bits control the field capture rate of the HMP8112. The user can select every 4th “FLD_CONT(2-0)” field, every other field or every field of video to be output to the data port. 000 = No Capture Enabled ...
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... PLL will reacquire the first HSYNC is detects. This bit is cleared by RESET Reserved Read This register is reserved for future use. This register will read all zero’s and is write ignored. Only HMP8112 DESTINATION ADDRESS = 16 H DESCRIPTION DESTINATION ADDRESS = 17 H ...
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... AGND AV CC AGND NC LIN2 LIN1 LIN0 L_ADIN L_OUT AGND AGND AV CC CLK AV CC AGND AGND A/D_TEST NC CIN NC HMP8112 TABLE 32. RESERVED DESTINATION ADDRESS = 1A H DESCRIPTION TABLE 33. PRODUCT ID REGISTER DESTINATION ADDRESS = 1B H DESCRIPTION . H 80 LEAD PQFP TOP VIEW ...
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... Output HSYNC 71 Output HMP8112 DESCRIPTION Analog Video Inputs. Inputs 0 and 1 are composite inputs. Input 2 can be either a composite input or the Y component of an S-Video signal. Analog Chroma input component of an S-Video Input. White Peak Enable. When enabled (‘1’), the video amplifiers gain is reduced when the digital output code exceeds 248. When disabled (‘ ...
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... Output NC 4, 18, 20 HMP8112 DESCRIPTION Vertical Sync. This video synchronous pulse is generated by the detection of a vertical sync on the video input. In the absence of video the VSYNC rate is set by the over flow of the internal line rate counter. This pin is three-stated after a RESET or software reset and should be pulled high through a 10K resistor. Field Flag. When set (‘ ...
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... Input Logic High Voltage Input Logic Low Voltage Input Logic Current HMP8112 Thermal Information Thermal Resistance (Typical, See Note 1) 0.5V PQFP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . CC Maximum Power Dissipation HMP8112CN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.9W Maximum Storage Temperature Range . . . . . . . . . .-65 Maximum Junction Temperatures . . . . . . . . . . . . . . . . . . . . . 150 Maximum Lead Temperature (Soldering 10s 300 ...
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... DVLD V V Input Termination of 75 and LIN[0:2], CIN 1 Coupling, Note 2 R Note 2 AIN SC AGC B 1V Sine Wave Input to P-P -3dBc Reduction, Note 2 + FULL SCALE Note 2 IN OFFSET/ZERO IN B A/D 25 HMP8112C MIN TYP MAX UNITS 2 0 0.7xV - - 0.3xV ...
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... X In Composite Input Mode, LUMA Note 2 X CHROMA t Time from Initial Lock LOCK Acquisition to an Error of 1 Pixel, Note 2 H Note 2 SYNC LOST V SYNC LOST = -4mA. Input reference level is 1.5V for all inputs HMP8112C MIN TYP MAX UNITS - 1.5 2.25 LSB - ...
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... Typical Performance Curves NTSC Composite Phase HMP8112 FIGURE 17. COLOR BARS NTSC 100% (EIA) FIGURE 18. COLOR BARS VECTORSCOPE 27 ...
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... Typical Performance Curves NTSC Composite Phase (Continued) HMP8112 (Continued) FIGURE 19. COLOR BARS VM700 TEST FIGURE 20. DIFFERENTIAL PHASE AND GAIN 28 ...
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... Typical Performance Curves NTSC Frequency Response FIGURE 22. MULTIBURST VM700 FREQUENCY ROLL-OFF TEST HMP8112 (Continued) FIGURE 21. MULTIBURST 29 ...
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... Typical Performance Curves NTSC Noise Measurements FIGURE 23. SIGNAL TO NOISE RATIO - FLAT FREQUENCY RESPONSE FIGURE 24. SIGNAL TO NOISE RATIO - 5.0MHz LOW PASS FILTERED HMP8112 (Continued) 30 ...
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... Typical Performance Curves NTSC Noise Measurements (Continued) FIGURE 25. SIGNAL TO NOISE RATIO - 4.2MHz LOW PASS FILTERED Pixel Jitter Test FIGURE 26. LONG TERM JITTER - 20 PULSE BAR 2T HMP8112 (Continued) 31 ...
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... Typical Performance Curves PAL Composite Phase HMP8112 (Continued) FIGURE 27. COLOR BARS NTSC 100% (EIA) FIGURE 28. COLOR BARS VECTORSCOPE 32 ...
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... Typical Performance Curves PAL Composite Phase (Continued) HMP8112 (Continued) FIGURE 29. COLOR BARS VM700 TEST FIGURE 30. DIFFERENTIAL PHASE AND GAIN 33 ...
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... Typical Performance Curves PAL Frequency Response HMP8112 (Continued) FIGURE 31. MULTIBURST FIGURE 32. NTSC MULTI-TEST PATTERN 34 ...
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... Typical Performance Curves FIGURE 33. NTSC CONVERGENCE TEST PATTERN HMP8112 (Continued) FIGURE 34. NTSC MULTIBURST TEST PATTERN 35 ...
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... Typical Performance Curves FIGURE 35. NTSC SMPTE COLORBARS TEST PATTERN HMP8112 (Continued) FIGURE 36. PAL CONVERGENCE TEST PATTERN 36 ...
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... Typical Performance Curves FIGURE 38. PAL SMPTE COLORBARS TEST PATTERN HMP8112 (Continued) FIGURE 37. PAL MULTIBURST TEST PATTERN 37 ...
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... TEMPERATURE = 2.6 2.8 3.0 3.2 3.4 3.6 GAIN CONTROL VOLTAGE FIGURE 39. CHROMINANCE AMPLIFIER GAIN vs GAIN CONTROL VOLTAGE Timing Waveforms t SU:DATA t BUF SDA SCL t LOW HMP8112 (Continued) 10 TEMPERATURE = 3.8 4.0 4.2 4.4 2.6 2.8 FIGURE 40. LUMINANCE AMPLIFIER GAIN vs AGC CAP VOLTAGE t HD:DATA HIGH R F FIGURE 41 ...
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... HMP8112, is recommended. All GND pins on the HMP8112 must be connected to the ground plane. Power Planes The HMP8112 should have its own power plane that is iso- lated from the common power plane of the board, with a gap between the two power planes of at least 1/8 inch. All V pins on the HMP8112 must be connected to this HMP8112 power plane ...
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... PIN 1 - -16 0.40 0.20 0.016 MIN 0.008 o 0 MIN 0.13/0. 0.005/0.007 5 -16 L BASE METAL WITH PLATING HMP8112 Q80.14x20 80 LEAD METRIC PLASTIC QUAD FLATPACK PACKAGE SYM- BOL - SEATING ND PLANE A NE 0.10 0.004 NOTES: -C- 1 ...