lm25061pmmx-2 National Semiconductor Corporation, lm25061pmmx-2 Datasheet - Page 4

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lm25061pmmx-2

Manufacturer Part Number
lm25061pmmx-2
Description
Positive Low Voltage Power Limiting Hot Swap Controller
Manufacturer
National Semiconductor Corporation
Datasheet

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
lm25061pmmx-2/NOPB
Manufacturer:
NS
Quantity:
90
www.national.com
Current Limit
Circuit Breaker
Timer (TIMER pin)
FB Pin
Power Good (PGD pin)
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
intended to be functional, but do not guarantee specific performance limits. For guaranteed specifications and conditions see the Electrical Characteristics.
Note 2: The human body model is a 100 pF capacitor discharged through a 1.5 kΩ resistor into each pin.
Note 3: OUT bias current (disabled) due to leakage current through an internal 1.0 MΩ resistance from SENSE to VOUT.
Note 4: For detailed information on soldering plastic MSOP packages refer to the Packaging Databook available from National Semiconductor Corporation.
Note 5: Current out of a pin is indicated as a negative number.
DC
Symbol
PGD
PGD
FB
V
FB
I
V
FB
I
t
FB
SENSE
TIMER
FAULT
V
V
TMRH
t
TMRL
t
FAULT
CB
CL
CB
BIAS
CL
HYS
DEL
TH
VOL
IOH
Threshold voltage
Response time
SENSE input current
Threshold voltage
Response time
Upper threshold
Lower threshold
Insertion time current
Sink current, end of insertion time
Fault detection current
Fault sink current
Fault Restart Duty Cycle
Fault to GATE low delay
FB threshold
FB hysteresis current
FB delay
FB bias current
Output low voltage
Off leakage current
Parameter
VIN-SENSE voltage
VIN-SENSE stepped from 0 mV to
80 mV
Enabled, SENSE = OUT
Disabled, OUT = 0V
Enabled, OUT = 0V
VIN - SENSE
VIN - SENSE stepped from 0 mV to
150 mV, time to GATE low, no load
Restart cycles (LM25061-2)
End of 8th cycle (LM25061-2)
Re-enable Threshold (LM25061-1)
TIMER pin = 2V
LM25061-2 only
TIMER pin reaches the upper
threshold
UVLO = 2V
FB = 2V
Delay to PGD high
Delay to PGD low
FB = 1V
I
V
SINK
PGD
4
= 2 mA
= 17V
Conditions
1.145
Min.
1.60
-110
-7.5
0.9
1.5
1.6
-27
45
75
Typ.
0.19
1.72
TBD
0.67
1.17
-5.5
100
110
1.0
0.3
-80
2.5
-22
50
15
23
12
62
95
20
15
2
1.195
Max.
0.36
1.85
110
-3.5
1.1
2.5
-50
3.4
-17
55
30
1
1
Units
mV
mV
mA
mV
µA
µA
µA
µA
µA
µA
µA
µs
µs
µs
ns
%
V
V
V
V
V

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