pi2eqx3202b Pericom Semiconductor Corporation, pi2eqx3202b Datasheet - Page 2

• Manufacturer Part Number: pi2eqx3202b
• Description: 4-channel Sata2 I/m Redriver, With Equalization And Oob
• Manufacturer: Pericom Semiconductor Corporation

Pin Description
D9, E9, F9, E10,
A9, A10, B9, C9
B3, F3, H4, B8,
B1, F1, D2, E2,
E1, J1, F2, E3,
J3, H7, E8, J8,
F8, B10, F10
A3, B4, B5
A4, C4, C5
H2, K2, J5
G2, J2, J4
K10, H9
K3, K4
K9, G9
B6, A5
C6, A6
B7, A7
C7, A8
Pin #
J6, J9
D10
G10
H10
C10
J10
D3
D8
G3
H3
D1
G1
H1
C3
C8
G8
H8
C1
08-0103
SEL[0:2]_A
SEL[0:2]_B
SEL[0:2]_C
SEL[0:2]_D
SEL[3:4]_A
SEL[3:4]_B
SEL[3:4]_C
SEL[3:4]_D
SEL[5:6]_A
SEL[5:6]_B
SEL[5:6]_C
SEL[5:6]_D
Pin Name
[A,B,C,D]
GND
AO+
BO+
DO+
V
CO+
EN_
AO-
BO-
CO-
DO-
AI+
DI+
BI+
CI+
AI-
DI-
BI-
CI-
DD
PWR
PWR
I/O
O
O
O
O
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
Supply Voltage, 1.5V to 1.8V ± 0.1V
CML Input Channel A with internal 50Ω pull down
Supply Ground
CML Input Channel B with internal 50Ω pull down
CML Input Channel C with internal 50Ω pull down
CML Input Channel D with internal 50Ω pull down
Selection pins for equalizer (see Amplifi er Confi guration Table)
w/ 50kΩ internal pull up
Selection pins for amplifi er (see Amplifi er Confi guration Table)
w/ 50kΩ internal pull up
Selection pins for De-Emphasis (See De-Emphasis Confi guration Table)
w/ 50kΩ internal pull up
CML Output Channel A internal 50Ω pull up to VDD during normal operation and
2kΩ when EN_A=0. Drives to output common mode voltage when input is <V
CML Output Channel B with internal 50Ω pull up to VDD during normal opera-
tion and 2kΩ when EN_B=0. Drives to output common mode voltage when input is
<V
CML Output Channel C with internal 50Ω pull up to VDD during normal opera-
tion and 2kΩ when EN_C=0. Drives to output common mode voltage when input is
<V
CMLOutput Channel D with internal 50Ω pull up to VDD during normal opera-
tion and 2kΩ when EN_D=0. Drives to output common mode voltage when input is
<V
Active HIGH LVCMOS signal input pins, when HIGH, it enables the CML output.
When LOW, it disables the CML output (x0+, x0-) to HI-z state. Both x0+ & x0- out-
puts will be pulled up to V
TH–
TH–
TH–
.
.
.
2
3.2Gbps, 4 Differential Channel, Serial Re-Driver
DD
with Equalization, De-emphasis, and Squelch
by internal 2kΩ resistor.
Description
PI2EQX3202B
PS8885G
(Continued)
TH–
04/30/08
.