pi2eqx5804d Pericom Semiconductor Corporation, pi2eqx5804d Datasheet - Page 14

• Manufacturer Part Number: pi2eqx5804d
• Description: 5.0gbps 4-lane Pcie? 2.0 Redrivertm With Equalization & Emphasis
• Manufacturer: Pericom Semiconductor Corporation

(3) Output Emphasis Configuration earlier in this document for setting information. All four A channels get
the same configuration settings.
BYTE 9 - B-Channels Equalizer and Output Control (BEOC)
SELx_B: Equalizer configuration,
Dx_B: Emphasis control,
Sx_B: Output level control (see Configuration Table)
Note: R=Read only, W=Write only, R/W=Read and Write, X=Undefined, rsvd=reserved for future use
The B-Channels Equalizer and Output Control register is used to control the configuration of the input equal-
izer and output emphasis and levels of the four B channels. These register bits are loaded from the input con-
figuration pins of the same name at power-on. These bits may be changed if the MODE# input is set to allow
I
(3) Output Emphasis Configuration earlier in this document for setting information. All four B channels get
the same configuration settings.
BYTE 10 - Reserved
BYTE 11 - Reserved
Reserved Bytes 10 and 11 are also visible via the I
00000000 and byte 11 is initialized to 11101111 at power up. These bytes are used for IC manufacturing test
purposes and should not be changed for normal operation.
Start & Stop Conditions
A HIGH to LOW transition on the SDA line while SCL is HIGH indicates a START condition. A LOW to
HIGH transition on the SDA line while SCL is HIGH defines a STOP condition, as shown in the figure below.
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2
C configuration. Please refer to the tables (1) Equalizer Configuration, (2) Output Swing Configuration and
Power-on
Name
Type
State
Bit
SEL0_B
SEL0_B
R/W
7
SEL1_B
SEL1_B
R/W
6
I C
SEL2_B
2
SEL2_B
5.0Gbps 4-Lane PCIe® 2.0 ReDriver™ with Equalization & Emphasis
R/W
5
2
C interface. These bytes are R/W, byte 10 is initialized to
D0_B
D0_B
R/W
14
4
10-0170
D1_B
D1_B
R/W
3
D2_B
D2_B
R/W
2
www.pericom.com
PI2EQX5804D
S0_B
S0_B
R/W
1
P-0.1
S1_B
S1_B
R/W
0
05/28/10