pi2eqxdp101 Pericom Semiconductor Corporation, pi2eqxdp101 Datasheet - Page 3

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pi2eqxdp101

Manufacturer Part Number
pi2eqxdp101
Description
1 To 1 Displayport? Redriver?
Manufacturer
Pericom Semiconductor Corporation
Datasheet
AUX listener Register Assignment
AUX command are stored interpreted and stored in the registers, ReDriver will then be re-confi gured by de-
fault. Registers do not have a power-on default state.
Address
00101h
00103h
00104h
00105h
00106h
09-0099
Name
Link initialization fi eld
DPCD Lane 0 status
DPCD Lane 1 status
DPCD Lane 2 status
DPCD Lane 3 status
Description
LANE_COUNT_SET
Bits3:0 = LANE_COUNT_SET
1h = One lane
2h = Two lanes
4h = Four lanes
For one-lane confi guration, Lane0 is used. For 2-lane confi guration, Lane0 and
Lane1 are used.
Bits7:4 = RESERVED. Read all 0’s.
TRAINING_LANE0_SET
Link Training Control_Lane0
Bits1:0 = DRIVE_CURRENT_SET
Bit2 = MAX_CURRENT_REACHED
Bit4:3 = PRE-EMPHASIS_SET
Bit5 = MAX_PRE-EMPHASIS_REACHED
Lane setting for lane 1.
The defi nition is the same as lane 0
Lane setting for lane 2.
The defi nition is the same as lane 0
Lane setting for lane 3.
The defi nition is the same as lane 0
Set to 1 when the maximum driven current setting is reached.
Note: Support of programmable drive current is optional. For
example if there is only 1 level, then program Bits2:0 to 100 to
indicate to the receiver that Level 1 is the maximum drive current.
Support of independent drive current controlfor each lane is also
optional.
00 = Training Pattern 2 w/o pre-emphasis
01 = Training Pattern 2 w/ pre-emphasis level 1
10 = Training Pattern 2 w/ pre-emphasis level 2
11 = Training Pattern 2 w/ pre-emphasis level 3
00 – Training Pattern 1 w/ level 0
01 – Training Pattern 1 w/ level 1
10 – Training Pattern 1 w/ level 2
11 – Training Pattern 1 w/ level 3
3
1 to 1 DisplayPort™ ReDriver™
PS9007B
PI2EQXDP101
Access
R/W
R/W
R/W
R/W
R/W
05/11/09

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