qlx4600-sl30 Intersil Corporation, qlx4600-sl30 Datasheet - Page 20

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qlx4600-sl30

Manufacturer Part Number
qlx4600-sl30
Description
Quad Lane Extender
Manufacturer
Intersil Corporation
Datasheet
Typical Application Reference Designs
Figures 33 and 34 show reference design schematics for a QLx4600-SL30 evaluation board with an SMA connector
interface. Figure 33 shows the schematic for the case when the equalizer boost level is set via the CP pins. Figure 34
shows the schematic for the case when the level is set via the serial bus interface.
FIGURE 33. APPLICATION CIRCUIT FOR THE QLx4600-SL30 EVALUATION BOARD USING THE CONTROL PINS FOR
Loss of signal indicator (Channels 1 and 2)
(*100pF capacitor should be positioned closest to the pin)
Bypass circuit for each V
SETTING THE EQUALIZER COMPENSATION LEVEL
1.2V
DD
1.2V
pin: 4, 7, 10, 29, 32, 35
20
Detection threshold
reference current
IN3[P]
IN3[N]
IN4[P]
IN4[N]
IN1[N]
IN2[N]
IN1[P]
IN2[P]
LOS1
LOS2
GND
1.2V
1.2V
1.2V
DT
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
QLx4600-SL30
QLx4600-SL30
for Channels 1 and 2
for Channels 3 and 4
A) DC Blocking Capacitors = X7R or COG
0.1µF (>4GHz bandwidth)
(See pages 15-17)
(See pages 15-17)
EQ Boost Control
EQ Boost Control
= SMA Connector
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
BGREF
OUT1[P]
OUT1[N]
1.2V
OUT2[P]
OUT2[N]
1.2V
OUT3[P]
OUT3[N]
1.2V
OUT4[P]
OUT4[N]
LOS3
LOS4
MODE
MODE
6kO
MODE at 1.2V: Serial Control Mode
MODE at GND: Binary Control Mode
A
Loss of signal indicator (Channels 3 and 4)
LANE EXTENDER
QLx4600-SL30
Control Pin Mode
Reference
Quellan, Inc.
November 19, 2009
FN6981.1

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