adg1433 Analog Devices, Inc., adg1433 Datasheet

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adg1433

Manufacturer Part Number
adg1433
Description
4 ? Ron, Triple/quad Spdt ?15 V/+12 V/?5 V Icmos Switches
Manufacturer
Analog Devices, Inc.
Datasheet

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FEATURES
4.7 Ω maximum on resistance @ 25°C
0.5 Ω on resistance flatness
33 V supply maximum ratings
Fully specified at ±15 V/+12 V/±5 V
3 V logic compatible inputs
Rail-to-rail operation
Break-before-make switching action
16-/20-lead TSSOP and 4 mm × 4 mm LFCSP_VQ packages
APPLICATIONS
Relay replacement
Audio and video routing
Automatic test equipment
Data acquisition systems
Temperature measurement systems
Avionics
Battery-powered systems
Communication systems
Medical equipment
GENERAL DESCRIPTION
The ADG1433 and ADG1434 are monolithic industrial-CMOS
(iCMOS) analog switches comprising three independently
selectable single-pole, double-throw (SPDT) switches and four
independently selectable SPDT switches, respectively.
All channels exhibit break-before-make switching action that
prevents momentary shorting when switching channels. An EN
input on the ADG1433 (LFCSP and TSSOP packages) and
ADG1434 (LFCSP package only) is used to enable or disable the
device. When disabled, all channels are switched off.
The iCMOS modular manufacturing process combines high
voltage, complementary metal-oxide semiconductor (CMOS)
and bipolar technologies. It enables the development of a wide
range of high performance analog ICs capable of 33 V operation
in a footprint that no other generation of high voltage parts has
been able to achieve. Unlike analog ICs using conventional
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
±15 V/+12 V/±5 V iCMOS
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
CMOS processes, iCMOS components can tolerate high supply
voltages while providing increased performance, dramatically
lower power consumption, and reduced package size.
The ultralow on resistance and on resistance flatness of these
switches make them ideal solutions for data acquisition and gain
switching applications, where low distortion is critical. iCMOS
construction ensures ultralow power dissipation, making the parts
ideally suited for portable and battery-powered instruments.
PRODUCT HIGHLIGHTS
1.
2.
3.
4.
S1A
S1B
S2B
S2A
SWITCHES SHOWN FOR
A “1” INPUT LOGIC.
IN1
IN2
D1
D2
4.7 Ω maximum on resistance.
0.5 Ω on resistance flatness.
3 V logic compatible digital input V
16-/20-lead TSSOP and 4 mm × 4 mm LFCSP_VQ packages.
Figure 2. ADG1434 TSSOP
4 Ω R
ADG1434
FUNCTIONAL BLOCK DIAGRAMS
Figure 1. ADG1433 TSSOP and LFCSP_VQ
S1A
S1B
S2B
S2A
SWITCHES SHOWN FOR
A “1” INPUT LOGIC.
D1
D2
ON
ADG1433/ADG1434
©2006 Analog Devices, Inc. All rights reserved.
, Triple/Quad SPDT
S4A
D2
S4B
IN4
IN3
S3B
D3
S3A
IN1 IN2 IN3 EN
ADG1433
LOGIC
S1A
S1B
S2B
S2A
SWITCHES SHOWN FOR
A “1” INPUT LOGIC.
Figure 3. ADG1434 LFCSP_VQ
D1
D2
S3B
D3
S3A
®
IH
IN1 IN2 IN3 IN4 EN
= 2.0 V, V
ADG1434
Switches
LOGIC
www.analog.com
IL
= 0.8 V.
S4A
D2
S4B
S3B
D3
S3A

Related parts for adg1433

adg1433 Summary of contents

Page 1

... SPDT switches, respectively. All channels exhibit break-before-make switching action that prevents momentary shorting when switching channels input on the ADG1433 (LFCSP and TSSOP packages) and ADG1434 (LFCSP package only) is used to enable or disable the device. When disabled, all channels are switched off. ...

Page 2

... V Dual Supply.......................................................................... Single Supply........................................................................ Dual Supply............................................................................ 6 Absolute Maximum Ratings............................................................ 7 REVISION HISTORY 10/06—Revision 0: Initial Version Thermal Resistance .......................................................................7 ESD Caution...................................................................................7 Pin Configurations and Function Descriptions ............................8 ADG1433........................................................................................8 ADG1434........................................................................................9 Typical Performance Characteristics ........................................... 10 Test Circuits..................................................................................... 13 Terminology .................................................................................... 15 Outline Dimensions ....................................................................... 16 Ordering Guide .......................................................................... 17 Rev Page ...

Page 3

... Rev Page ADG1433/ADG1434 Unit Test Conditions/Comments V Ω typ V = ± −10 mA; see Figure Ω max V = +13 −13 Ω typ V = ± − Ω ...

Page 4

... ADG1433/ADG1434 Parameter Temperature range for Y version: −40°C to +125°C. 2 Guaranteed by design, not subject to production test. −40°C to −40° +25°C +85°C +125°C 0.001 1 ±4.5/±16.5 Rev Page Unit Test Conditions/Comments μA typ Digital inputs = μ ...

Page 5

... V min/max Rev Page ADG1433/ADG1434 Test Conditions/Comments −10 mA, see Figure 10 − − ...

Page 6

... ADG1433/ADG1434 5 V DUAL SUPPLY ± 10 −5 V ± 10%, GND = 0 V, unless otherwise noted Table 3. Parameter ANALOG SWITCH Analog Signal Range On Resistance ( Resistance Match Between Channels (Δ Resistance Flatness (R ) FLAT(ON) LEAKAGE CURRENTS Source Off Leakage, I (OFF) S Drain Off Leakage, I ...

Page 7

... THERMAL RESISTANCE θ is specified for the worst-case conditions, that is, a device JA soldered in a circuit board for surface-mount packages. Table 5. Thermal Resistance Package Type TSSOP + 0 LFCSP_VQ DD ESD CAUTION Rev Page ADG1433/ADG1434 θ θ Unit JA JC 150.4 50 °C/W 30.4 – °C/W ...

Page 8

... TOP VIEW 4 13 (Not to Scale) S2B S2A 7 10 IN2 8 9 Figure 4. TSSOP Pin Configuration Table 6. ADG1433 Pin Function Descriptions Pin Number TSSOP LFCSP_VQ Mnemonic Description Most Positive Power Supply Potential S1A Source Terminal 1A. Can be an input or an output Drain Terminal 1 ...

Page 9

... IN4 S4A D4 S4B S3B D3 S3A IN3 SxA Off On SxA Off Off On Rev Page ADG1433/ADG1434 PIN 1 INDICATOR S1B 2 ADG1434 14 S4B TOP VIEW GND 4 12 S3B (Not to Scale) S2B Figure 7. LFCSP_VQ Pin Configuration ...

Page 10

... ADG1433/ADG1434 TYPICAL PERFORMANCE CHARACTERISTICS 25° +15V –15V +13.5V –13. +12V –12V +10V –10V +16.5V –16. –16.5 –12.5 –8.5 –4.5 –0.5 3.5 SOURCE OR DRAIN VOLTAGE (V) Figure 8. On Resistance as a Function 25°C ...

Page 11

... (OFF) + – S (ON) – – I (OFF) – 100 120 (ON (ON) – – (OFF) – 100 120 Rev Page ADG1433/ADG1434 +15V +12V V = –15V + –5V ...

Page 12

... ADG1433/ADG1434 +15V DD – –15V 25°C A –20 –30 –40 –50 –60 –70 –80 –90 –100 –110 1k 10k 100k 1M FREQUENCY (Hz) Figure 20. Off Isolation vs. Frequency +15V DD – –15V 25°C A –20 –30 –40 –50 –60 –70 –80 –90 –100 –110 1k 10k ...

Page 13

... ENABLE ADG1433 DRIVE ( S1A S A1 S1B V OUT OUT OUTPUT GND L 100Ω 35pF ( EN Figure 30. Enable Delay Rev Page ADG1433/ADG1434 I (OFF) I (OFF Figure 26. Off Leakage 50% 50% 50% 50% 90% 90 OFF 80 ...

Page 14

... ADG1433/ADG1434 V DD 0.1µ 0.1µF 0.1µ 50Ω GND V OUT OFF ISOLATION = 20 log V Figure 32. Off Isolation 0.1µF 0.1µ 50Ω GND V OUT INSERTION LOSS = 20 log V WITHOUT SWITCH OUT Figure 33 ...

Page 15

... A measure of the ability of a part to avoid coupling noise and spurious signals that appear on the supply voltage pin to the output of the switch. The dc voltage on the device is modulated by a sine wave of 0.62 V p-p. The ratio of the amplitude of signal on the output to the amplitude of the modulation is the ACPSRR. Rev Page ADG1433/ADG1434 ...

Page 16

... ADG1433/ADG1434 OUTLINE DIMENSIONS 0.15 0.05 PIN 1 INDICATOR 1.00 0.85 0.80 SEATING PLANE 5.10 5.00 4. 4.50 6.40 4.40 BSC 4. PIN 1 1.20 MAX 0.20 0.09 0.30 0.65 0.19 SEATING BSC PLANE COPLANARITY 0.10 COMPLIANT TO JEDEC STANDARDS MO-153-AB Figure 36. 16-Lead Thin Shrink Small Outline Package [TSSOP] (RU-16) Dimensions shown in millimeters 4.00 0.60 MAX BSC 3.75 EXPOSED BSC SQ 0. BSC TOP VIEW 1.95 BCS BOT TOM VIEW 12° ...

Page 17

... ADG1433YRUZ 1 −40°C to +125°C 1 ADG1433YRUZ-REEL −40°C to +125°C 1 ADG1433YRUZ-REEL7 −40°C to +125°C 1 ADG1433YCPZ-REEL −40°C to +125°C 1 ADG1433YCPZ-REEL7 −40°C to +125°C 1 ADG1434YRUZ −40°C to +125°C 1 ADG1434YRUZ-REEL −40°C to +125°C 1 ADG1434YRUZ-REEL7 −40°C to +125°C 1 ADG1434YCPZ-REEL − ...

Page 18

... ADG1433/ADG1434 NOTES Rev Page ...

Page 19

... NOTES Rev Page ADG1433/ADG1434 ...

Page 20

... ADG1433/ADG1434 NOTES ©2006 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D06181-0-10/06(0) Rev Page ...

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