cbtl04082a NXP Semiconductors, cbtl04082a Datasheet

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cbtl04082a

Manufacturer Part Number
cbtl04082a
Description
Cbtl04082a; Cbtl04082b 3.3 V, 4 Differential Channel, 2 1 Multiplexer/demultiplexer Switch For Pci Express Gen2
Manufacturer
NXP Semiconductors
Datasheet
1. General description
2. Features and benefits
CBTL04082A/B is an 8-to-4 bidirectional differential channel multiplexer/demultiplexer
switch for PCI Express Generation 2 (Gen2) applications. The CBTL04082A/B can switch
four differential signals to one of two locations. Using a unique design technique, NXP has
minimized the impedance of the switch such that the attenuation observed through the
switch is negligible, and also minimized the channel-to-channel skew as well as
channel-to-channel crosstalk, as required by the high-speed serial interface.
CBTL04082A/B allows expansion of existing high speed ports for extremely low power.
The devices’ pinouts are optimized to match different application layouts. CBTL04082A
has input and output pins on the opposite of the package, and is suitable for edge
connector(s) with different signal sources on the motherboard. CBTL04082B has outputs
on both sides of the package, and the device can be placed between two connectors to
multiplex differential signals from a controller. Please refer to
examples.
CBTL04082A; CBTL04082B
3.3 V, 4 differential channel, 2 : 1 multiplexer/demultiplexer
switch for PCI Express Gen2
Rev. 1 — 28 February 2011
4 bidirectional differential channel, 2 : 1 multiplexer/demultiplexer
High-speed signal switching for PCIe Gen2 5 Gbit/s
High bandwidth: 6 GHz at −3 dB
Insertion loss:
Low intra-pair skew: 5 ps typical
Low inter-pair skew: 35 ps maximum
Low crosstalk: −30 dB at 2.5 GHz
Low off-state isolation: −25 dB at 2.5 GHz
Low return loss: −20 dB at 2.5 GHz
V
Dual shutdown pins for channel 0/1 and 2/3 independently to minimize power
consumption
ESD tolerance:
HVQFN42 package
DD
−0.5 dB at 100 MHz
−1.2 dB at 2.5 GHz
Standby current less than 1 μA
8 kV HBM
1 kV CDM
operating range: 3.3 V ± 10 %
Section 8
Product data sheet
for layout

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cbtl04082a Summary of contents

Page 1

... CBTL04082A/B allows expansion of existing high speed ports for extremely low power. The devices’ pinouts are optimized to match different application layouts. CBTL04082A has input and output pins on the opposite of the package, and is suitable for edge connector(s) with different signal sources on the motherboard ...

Page 2

... A0_P A0_N A1_P A1_N XSD01 A2_P A2_N A3_P A3_N XSD23 SEL Functional diagram of CBTL04082A; CBTL04082B All information provided in this document is subject to legal disclaimers. Rev. 1 — 28 February 2011 [1] [1] B0_P B0_N B1_P B1_N C0_P C0_N C1_P C1_N ...

Page 3

... A1_P 6 5 A1_N 7 6 A2_P 11 10 A2_N 12 11 A3_P 15 14 A3_N 16 15 CBTL04082A_CBTL04082B Product data sheet CBTL04082A; CBTL04082B 3 differential channel MUX/deMUX switch for PCIe Gen2 CBTL04082ABS GND 1 38 B0_P 2 37 B0_N 3 36 B1_P GND 4 35 B1_N C0_P DD ...

Page 4

... CBTL04082A_CBTL04082B Product data sheet CBTL04082A; CBTL04082B 3 differential channel MUX/deMUX switch for PCIe Gen2 Type Description ...

Page 5

... Shutdown function The CBTL04082A/B provides a shutdown function to minimize power consumption when the application is not active, but power to the CBTL04082A/B is provided. Pin XSD01 and XSD23 (active HIGH) places channel 0/1 and 2/3 (respectively) in high-impedance state (non-conducting) while reducing current consumption to near-zero. Table 4. XSD01 ...

Page 6

... NXP Semiconductors 8. Application design-in information Fig 3. CBTL04082A_CBTL04082B Product data sheet CBTL04082A; CBTL04082B 3 differential channel MUX/deMUX switch for PCIe Gen2 CBTL04082A PCI EXPRESS CONTROLLER A/B pinout difference (layout) All information provided in this document is subject to legal disclaimers. Rev. 1 — 28 February 2011 CBTL04082B 002aaf773 © ...

Page 7

... Typical values are 3 Input leakage current is ±50 μA if differential pairs are pulled to HIGH and LOW. [2] CBTL04082A_CBTL04082B Product data sheet CBTL04082A; CBTL04082B 3 differential channel MUX/deMUX switch for PCIe Gen2 Limiting values Parameter supply voltage case temperature electrostatic discharge voltage ...

Page 8

... Typical values are 3 CBTL04082A_CBTL04082B Product data sheet CBTL04082A; CBTL04082B 3 differential channel MUX/deMUX switch for PCIe Gen2 ° +85 C; unless otherwise specified. Conditions channel is OFF f = 100 MHz f = 2.5 GHz channel 100 MHz ...

Page 9

... NXP Semiconductors Fig 4. CBTL04082A_CBTL04082B Product data sheet CBTL04082A; CBTL04082B 3 differential channel MUX/deMUX switch for PCIe Gen2 SEL 0. PZL output 1 0.25V t PZH 0.85V output 2 Output 1 is for an output with internal conditions such that the output is LOW except when disabled by the output control ...

Page 10

... Test PLZ PZL PHZ PZH t PD CBTL04082A_CBTL04082B Product data sheet CBTL04082A; CBTL04082B 3 differential channel MUX/deMUX switch for PCIe Gen2 V IC PULSE GENERATOR load capacitance; includes jig and probe capacitance termination resistance; should be equal All input pulses are supplied by generators having the following characteristics: PRR ≤ 5 MHz; ...

Page 11

... Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. Outline version IEC SOT1144 Fig 7. Package outline SOT1144-1 (HVQFN42) CBTL04082A_CBTL04082B Product data sheet CBTL04082A; CBTL04082B 3 differential channel MUX/deMUX switch for PCIe Gen2 1 ...

Page 12

... Solder bath specifications, including temperature and impurities CBTL04082A_CBTL04082B Product data sheet CBTL04082A; CBTL04082B 3 differential channel MUX/deMUX switch for PCIe Gen2 All information provided in this document is subject to legal disclaimers. Rev. 1 — 28 February 2011 © NXP B.V. 2011. All rights reserved. ...

Page 13

... Moisture sensitivity precautions, as indicated on the packing, must be respected at all times. Studies have shown that small packages reach higher temperatures during reflow soldering, see CBTL04082A_CBTL04082B Product data sheet CBTL04082A; CBTL04082B 3 differential channel MUX/deMUX switch for PCIe Gen2 and 11 SnPb eutectic process (from J-STD-020C) Package reflow temperature (°C) ...

Page 14

... I/O PCI PCIe PRR SATA USB CBTL04082A_CBTL04082B Product data sheet CBTL04082A; CBTL04082B 3 differential channel MUX/deMUX switch for PCIe Gen2 maximum peak temperature = MSL limit, damage level temperature minimum peak temperature = minimum soldering temperature MSL: Moisture Sensitivity Level Temperature profiles for large and small components ...

Page 15

... NXP Semiconductors 17. Revision history Table 13. Revision history Document ID CBTL04082A_CBTL04082B v.1 CBTL04082A_CBTL04082B Product data sheet CBTL04082A; CBTL04082B 3 differential channel MUX/deMUX switch for PCIe Gen2 Release date Data sheet status 20110228 Product data sheet All information provided in this document is subject to legal disclaimers. ...

Page 16

... CBTL04082A_CBTL04082B Product data sheet CBTL04082A; CBTL04082B 3 differential channel MUX/deMUX switch for PCIe Gen2 [3] Definition This document contains data from the objective specification for product development. ...

Page 17

... For sales office addresses, please send an email to: CBTL04082A_CBTL04082B Product data sheet CBTL04082A; CBTL04082B 3 differential channel MUX/deMUX switch for PCIe Gen2 NXP Semiconductors’ specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors’ ...

Page 18

... Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2011. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com All rights reserved. Date of release: 28 February 2011 Document identifier: CBTL04082A_CBTL04082B ...

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