cbtl03sb212 NXP Semiconductors, cbtl03sb212 Datasheet

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cbtl03sb212

Manufacturer Part Number
cbtl03sb212
Description
Cbtl03sb212 Displayport Gen2 Sideband Signal Multiplexer
Manufacturer
NXP Semiconductors
Datasheet
1. General description
The CBTL03SB212 is a sideband signal multiplexer for DisplayPort Gen2 applications. It
provides one differential channel capable of switching or multiplexing (bidirectional and
AC-coupled) DisplayPort 1.2 Fast AUX or AUX signal, using high-bandwidth pass-gate
technology. Additionally, it provides for switching/multiplexing of the Hot Plug Detect signal
as well as the Display Data Channel (DDC) signals, for a total of three channels.
A typical application of CBTL03SB212 is on motherboards where one of two GPU display
sources needs to be selected to connect to a display sink device or connector. A controller
chip selects which path to use by setting a select signal HIGH or LOW. Due to the
non-directional nature of the signal paths (which use high-bandwidth pass-gate
technology), the CBTL03SB212 can also be used in the reverse topology, e.g., to connect
one display source device to one of two display sink devices or connectors.
Fig 1.
CBTL03SB212
DisplayPort Gen2 sideband signal multiplexer
Rev. 1 — 21 February 2011
CBTL03SB212 application example
GPU1
GPU2
2 kΩ
DDC_CLK1
DDC_CLK2
DDC_DAT1
DDC_DAT2
+3.3 V
HPD_1
HPD_2
AUX1+
AUX1−
AUX2+
AUX2−
CBTL03SB212
MUX
MUX
MUX
2 : 1
2 : 1
2 : 1
SEL, XSD_N
100 kΩ
100 kΩ
+3.3 V
GND
Product data sheet
002aag007
AUX+
AUX−
DDC_CLK
DDC_DAT
HPD

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cbtl03sb212 Summary of contents

Page 1

... HIGH or LOW. Due to the non-directional nature of the signal paths (which use high-bandwidth pass-gate technology), the CBTL03SB212 can also be used in the reverse topology, e.g., to connect one display source device to one of two display sink devices or connectors. ...

Page 2

... DisplayPort Gen2 sideband signal multiplexer Description plastic thermal enhanced very thin quad flat package; no leads; 20 terminals; body 4 × 4 × 0.85 mm All information provided in this document is subject to legal disclaimers. Rev. 1 — 21 February 2011 CBTL03SB212 [1] © NXP B.V. 2011. All rights reserved. Version SOT917 ...

Page 3

... CBTL03SB212BS 3 DDC_DAT 4 HPD SEL 5 Transparent top view Pin configuration for HVQFN20 All information provided in this document is subject to legal disclaimers. Rev. 1 — 21 February 2011 CBTL03SB212 DisplayPort Gen2 sideband signal multiplexer AUX MUX AUX− DDC_CLK MUX DDC_DAT HPD MUX ...

Page 4

... I power supply 19 ground All information provided in this document is subject to legal disclaimers. Rev. 1 — 21 February 2011 CBTL03SB212 Description Selects between two multiplexer/switch paths. Shutdown pin. Should be driven HIGH or connected to V for normal operation. When DD LOW, all paths are switched off (non-conducting high-impedance state), and supply current consumption is minimized ...

Page 5

... SEL 0 1 7.2 Shutdown function The CBTL03SB212 provides a shutdown function to minimize power consumption when the application is not active but power to the CBTL03SB212 is provided. Pin XSD_N (active LOW) puts all channels in Off mode (non-conducting high-impedance state) while reducing current consumption to near-zero. Table 4. XSD_N ...

Page 6

... HBM voltage CDM Recommended operating conditions Parameter Conditions supply voltage input voltage ambient temperature operating in free air All information provided in this document is subject to legal disclaimers. Rev. 1 — 21 February 2011 CBTL03SB212 Min Max Unit −0 −40 °C +85 [1] - 4000 ...

Page 7

... Hz ≤ f ≤ 1.0 GHz −3.0 dB intercept from left-side port to right-side port or vice versa intra-pair Conditions from left-side port to right-side port or vice versa All information provided in this document is subject to legal disclaimers. Rev. 1 — 21 February 2011 CBTL03SB212 Min Typ = ...

Page 8

... Conditions from left-side port to right-side port or vice versa Conditions SEL, XSD_N SEL, XSD_N measured with input at V and V IH(max) IL(min) All information provided in this document is subject to legal disclaimers. Rev. 1 — 21 February 2011 CBTL03SB212 Min Typ Max −0.3 [1] - 3.6 - 100 - Min Typ Max 2 ...

Page 9

... 4.1 2.45 4.1 2.45 0.5 2 3.9 2.15 3.9 2.15 REFERENCES JEDEC JEITA MO-220 - - - All information provided in this document is subject to legal disclaimers. Rev. 1 — 21 February 2011 CBTL03SB212 DisplayPort Gen2 sideband signal multiplexer detail 0.6 0.05 0.1 2 0.1 0.05 0.4 EUROPEAN PROJECTION ...

Page 10

... Solder bath specifications, including temperature and impurities CBTL03SB212 Product data sheet DisplayPort Gen2 sideband signal multiplexer All information provided in this document is subject to legal disclaimers. Rev. 1 — 21 February 2011 CBTL03SB212 © NXP B.V. 2011. All rights reserved ...

Page 11

... Package reflow temperature (°C) 3 Volume (mm ) < 350 260 260 250 Figure 5. All information provided in this document is subject to legal disclaimers. Rev. 1 — 21 February 2011 CBTL03SB212 Figure 5) than a SnPb process, thus ≥ 350 220 220 350 to 2000 > 2000 260 260 250 245 245 245 © ...

Page 12

... Hot Plug Detect Input/Output Multiplexer Printed-Circuit Board SubMiniature, version A (connector) Time-Domain Reflectometry All information provided in this document is subject to legal disclaimers. Rev. 1 — 21 February 2011 CBTL03SB212 DisplayPort Gen2 sideband signal multiplexer peak temperature time 001aac844 © NXP B.V. 2011. All rights reserved ...

Page 13

... NXP Semiconductors 15. Revision history Table 15. Revision history Document ID Release date CBTL03SB212 v.1 20110221 CBTL03SB212 Product data sheet DisplayPort Gen2 sideband signal multiplexer Data sheet status Change notice Product data sheet - All information provided in this document is subject to legal disclaimers. Rev. 1 — 21 February 2011 ...

Page 14

... Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities. All information provided in this document is subject to legal disclaimers. Rev. 1 — 21 February 2011 CBTL03SB212 © NXP B.V. 2011. All rights reserved ...

Page 15

... NXP Semiconductors’ product specifications. 16.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. http://www.nxp.com salesaddresses@nxp.com All information provided in this document is subject to legal disclaimers. Rev. 1 — 21 February 2011 CBTL03SB212 © NXP B.V. 2011. All rights reserved ...

Page 16

... Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2011. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com All rights reserved. Date of release: 21 February 2011 Document identifier: CBTL03SB212 ...

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