W230H Cypress Semiconductor Corp., W230H Datasheet - Page 6

• Manufacturer Part Number: W230H
• Description: Frequency Timing Generators For PC And Server Motherboards
• Manufacturer: Cypress Semiconductor Corp.

Writing Data Bytes
Each bit in the data bytes controls a particular device function
except for the “reserved” bits, which must be written as a logic
0. Bits are written MSB (most significant bit) first, which is bit
Table 5. Data Bytes 0–7 Serial Configuration Map
Document #: 38-07224 Rev. *A
Data Byte 0
Data Byte 1
Data Byte 2
Data Byte 3
Bit(s)
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
7
6
5
4
3
2
Pin No.
21, 20,
18, 17
13
12
11
10
26
25
--
--
--
--
--
--
--
--
--
--
--
--
--
--
--
--
--
--
--
--
--
7
8
Affected Pin
SEL_48MHz SEL_48MHz as the output fre-
SDRAM8:11 Clock Output Disable
24_48MHz
Pin Name
48MHz
PCI0
PCI5
PCI4
PCI3
PCI2
PCI1
--
--
--
--
--
--
--
--
--
--
--
--
--
--
--
--
--
--
--
--
(Reserved)
SEL_2
SEL_1
SEL_0
Hardware/Software Frequency
Select
SEL_4
SEL_3
(Reserved)
(Reserved)
(Reserved)
(Reserved)
(Reserved) Write to ‘1’
(Reserved) Write to ‘1’
(Reserved) Write to ‘1’
(Reserved) Write to ‘1’
(Reserved)
Clock Output Disable
(Reserved)
Clock Output Disable
Clock Output Disable
Clock Output Disable
Clock Output Disable
Clock Output Disable
(Reserved)
quency for 24_48MHz
Clock Output Disable
Clock Output Disable
(Reserved)
Control Function
7. Table 5 gives the bit formats for registers located in Data
Bytes 0–7.
Table 6 details additional frequency selections that are avail-
able through the serial data interface.
Hardware
24-MHz
Normal
Low
Low
Low
Low
Low
Low
Low
Low
Low
--
--
--
--
--
--
--
--
--
--
--
--
--
0
See Table 6
See Table 6
See Table 6
See Table 6
See Table 6
Bit Control
Three-stated
Software
48-MHz
Active
Active
Active
Active
Active
Active
Active
Active
Active
--
--
--
--
--
--
--
--
--
--
--
--
--
1
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Default
W230
0
0
0
0
0
1
0
0
0
0
0
0
1
1
1
1
0
1
0
1
1
1
1
1
0
0
1
1
0
1