tc74hct646ap TOSHIBA Semiconductor CORPORATION, tc74hct646ap Datasheet

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tc74hct646ap

Manufacturer Part Number
tc74hct646ap
Description
Octal Bus Transceiver/register 3-state
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
Octal Bus Transceiver/Register (3-state)
TRANSCEIVER/REGISTERs fabricated with silicon gate C
technology.
LSTTL while maintaining the CMOS low power dissipation.
voltage levels.
flip-flops, and control circuitry arranged for multiplexed
transmission of data directly from the internal registers.
discharge or transient excess voltage.
Features (Note 1)(Note 2)
Pin Assignment
The TC74HCT646A is high speed CMOS OCTAL BUS
It achieves the high speed operation similar to equivalent
Its inputs are compatible with TTL, NMOS, and CMOS output
This device is bus transceiver with 3-state outputs, D-type
All inputs are equipped with protection circuits against static
High speed: f
Low power dissipation: I
Compatible with TTL output: V
Output drive capability: 15 LSTTL loads
Symmetrical output impedance: |I
Balanced propagation delays: t
Pin and function compatible with 74LS646
Note 1: Do not apply a signal to any bus terminal when it is in the output mode. Damage may result.
Note 2: All floating (high impedance) bus terminals must have their input levels fixed by means of pull up or pull
down resistors.
max
= 60 MHz (typ.) at V
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic
CC
= 4 μA (max) at Ta = 25°C
TC74HCT646AP
V
pLH
IH
IL
= 0.8 V (max)
= 2.0 V (min)
OH
∼ − t
| = I
CC
pHL
= 5 V
OL
= 6 mA (min)
1
2
MOS
Weight: 1.50 g (typ.)
TC74HCT646AP
2007-10-01

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tc74hct646ap Summary of contents

Page 1

... Note 1: Do not apply a signal to any bus terminal when the output mode. Damage may result. Note 2: All floating (high impedance) bus terminals must have their input levels fixed by means of pull up or pull down resistors. Pin Assignment MOS 2.0 V (min 0.8 V (max (min ∼ − t pLH pHL 1 TC74HCT646AP Weight: 1.50 g (typ.) 2007-10-01 ...

Page 2

... CBA. The data in the B storage flip-flops are displayed the A bus. The data on the B bus are stored into the storage flip-flops on the rising edge of CBA, and H H the stored data propagate directly onto the A bus. 2 TC74HCT646AP Function 2007-10-01 ...

Page 3

... Timing Chart System Diagram TC74HCT646AP 3 2007-10-01 ...

Page 4

... V CC −0.5 −0.5~V + 0.5 V OUT CC ± ± ±35 I OUT ± 500 (DIP) D −65~150 T stg Symbol Rating V 4.5~5 0 0~V OUT CC −40~85 T opr 0~500 TC74HCT646AP Unit (Note 2) mW °C Unit °C ns 2007-10-01 ...

Page 5

... Per input 5.5 Other input GND ns Test Condition Symbol t W (L) ⎯ (H) ⎯ ⎯ ⎯ TC74HCT646AP Ta = 25° −40~85°C Min Typ. Max Min Max ⎯ ⎯ ⎯ 2.0 2.0 ⎯ ⎯ ⎯ 0.8 0.8 ⎯ ⎯ 4.4 4.5 4.4 ⎯ ⎯ 4.18 4 ...

Page 6

... L 4.5 150 5.5 4 kΩ 5.5 4.5 ⎯ 50 5.5 ⎯ (per bit TC74HCT646AP Ta = 25° −40~85°C Min Typ. Max Min Max ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ...

Page 7

... Package Dimensions Weight: 1.50 g (typ.) TC74HCT646AP 7 2007-10-01 ...

Page 8

... Please contact your sales representative for product-by-product details in this document regarding RoHS compatibility. Please use these products in this document in compliance with all applicable laws and regulations that regulate the inclusion or use of controlled substances. Toshiba assumes no liability for damage or losses occurring as a result of noncompliance with applicable laws and regulations. TC74HCT646AP 8 20070701-EN GENERAL 2007-10-01 ...

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