tc74hc646ap TOSHIBA Semiconductor CORPORATION, tc74hc646ap Datasheet

tc74hc646ap

Manufacturer Part Number

tc74hc646ap

Description

Octal Bus Transceiver/register

Manufacturer

TOSHIBA Semiconductor CORPORATION

Datasheet

1.TC74HC646AP.pdf (8 pages)

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Octal Bus Transceiver/Register (3-state)

TRANSCEIVER/REGISTERs fabricated with silicon gate C

technology.

LSTTL while maintaining the CMOS low power dissipation.

flip-flops, and control circuitry arranged for multiplexed

transmission of data directly from the internal registers.

become inputs and the B1 thru B8 become outputs. When the

DIR input is held low, the A1 thru A8 become output and the B1

thru B8 become inputs.

CBA clock inputs, respectively.

Features (Note 1) (Note 2)

•

Pin Assignment

The TC74HC646A is high speed CMOS OCTAL BUS

It achieves the high speed operation similar to equivalent

This device is bus transceiver with 3-state outputs, D-type

When the direction input (DIR) is held high, the A1 thru A8

The enable input G is held high, both the A Bus and B Bus become high impedance.

The select inputs (SAB, SBA) can muiltiplex stored and real-time (transparent mode) data.

Data on the A Bus or B Bus can be clocked into the registers on the positive going transition of either CAB or

All inputs are equipped with protection circuits against static discharge or transient excess voltage.

High speed: f

Low power dissipation: I

High noise immunity: V

Output drive capability: 15 LSTTL loads

Symmetrical output impedance: |I

Balanced propagation delays: t

Wide operating voltage range: V

Pin and function compatible with 74LS646

Note 1: Do not apply a signal to any bus terminal when it is in the out put mode. Damage may result.

Note 2: All floating (high impedance) bus terminals must have their input levels fixed by means of pull up or pull

down resistors.

max

= 73 MHz (typ.) at V

TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic

NIH

= 4 μA (max) at Ta = 25°C

= V

pLH

TC74HC646AP

NIL

∼ − t

(opr) = 2 to 6 V

= 28% V

| = I

pHL

= 5 V

= 6 mA (min)

(min)

MOS

Weight: 1.50 g (typ.)

TC74HC646AP

2007-10-01

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tc74hc646ap Summary of contents

Page 1

... Note 2: All floating (high impedance) bus terminals must have their input levels fixed by means of pull up or pull down resistors. Pin Assignment TC74HC646AP MOS 28% V (min) NIL (min ∼ − t pLH pHL (opr TC74HC646AP Weight: 1.50 g (typ.) 2007-10-01 ...

Page 2

... CBA. The data in the B storage flip-flops are displayed the A bus. The data on the B bus are stored into the storage flip-flops on the rising edge of CBA, and H H the stored data propagate directly onto the A bus. 2 TC74HC646AP Function 2007-10-01 ...

Page 3

... Timing Chart System Diagram 3 TC74HC646AP 2007-10-01 ...

Page 4

... CC P 500 D −65 to 150 T stg Symbol Rating OUT CC − opr = 2 1000 ( 4 500 ( 6 400 ( TC74HC646AP Unit (Note 2) mW °C Unit °C ns 2007-10-01 ...

Page 5

... GND 6 ns Test Condition Symbol t W (H) ⎯ (L) ⎯ ⎯ ⎯ TC74HC646AP Ta = − 25°C 85°C Min Typ. Max Min Max ⎯ ⎯ ⎯ 1.50 1.50 ⎯ ⎯ ⎯ 3.15 3.15 ⎯ ⎯ ⎯ 4.20 4.20 ⎯ ⎯ ⎯ 0.50 0.50 ⎯ ...

Page 6

... L 2.0 150 4.5 6.0 2 kΩ 50 4.5 L 6.0 2.0 ⎯ 50 4.5 6.0 ⎯ ⎯ ⎯ (per bit TC74HC646AP Ta = − 25°C 85°C Min Typ. Max Min Max ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ 74 150 190 ⎯ ⎯ ⎯ ...

Page 7

... Package Dimensions Weight: 1.50 g (typ.) 7 TC74HC646AP 2007-10-01 ...

Page 8

... Please contact your sales representative for product-by-product details in this document regarding RoHS compatibility. Please use these products in this document in compliance with all applicable laws and regulations that regulate the inclusion or use of controlled substances. Toshiba assumes no liability for damage or losses occurring as a result of noncompliance with applicable laws and regulations. 8 TC74HC646AP 20070701-EN GENERAL 2007-10-01 ...

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