mk50n512cmc100 Freescale Semiconductor, Inc, mk50n512cmc100 Datasheet

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... Freescale Semiconductor Data Sheet: Product Preview K50 Sub-Family Data Sheet Supports the following: MK50X256CMC100, MK50N512CMC100 Features • Operating Characteristics – Voltage range: 1.71 to 3.6 V – Flash write voltage range: 1.71 to 3.6 V – Temperature range (ambient): -40 to 85°C • Performance – 100 MHz ARM Cortex-M4 core with DSP instructions delivering 1 ...

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... DSPI switching specifications (low-speed mode)..55 6.8.5 DSPI switching specifications (high-speed mode) 56 6.8.6 I2C switching specifications..................................58 6.8.7 UART switching specifications..............................58 6.8.8 SDHC specifications.............................................58 6.8.9 I2S switching specifications..................................59 6.9 Human-machine interfaces (HMI)......................................61 6.9.1 TSI electrical specifications...................................61 7 Dimensions...............................................................................62 7.1 Obtaining package dimensions.........................................62 8 Pinout........................................................................................63 8.1 K50 Signal Multiplexing and Pin Assignments..................63 Preliminary Freescale Semiconductor, Inc. ...

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... K50 Pinouts.......................................................................68 K50 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. 9 Revision History........................................................................68 Preliminary 3 ...

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... K50 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. 4 http://www.freescale.com Description • Fully qualified, general market flow • Prequalification • K50 • Program flash only • Program flash and FlexMemory Table continues on the next page... Preliminary and perform a part number Values Freescale Semiconductor, Inc. ...

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... An operating requirement is a specified value or range of values for a technical characteristic that you must guarantee during operation to avoid incorrect operation and possibly decreasing the useful life of the chip. K50 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Description • • • ...

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... Example This is an example of an attribute: Symbol Description CIN_D Input capacitance: digital pins K50 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. 6 Min. Max. 0.9 1.1 Min. Max. 10 130 Min. Max. — 7 Preliminary Unit V Unit µA Unit pF Freescale Semiconductor, Inc. ...

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... Result of exceeding a rating Measured characteristic K50 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Min. –0.3 1.2 The likelihood of permanent chip failure increases rapidly as soon as a characteristic begins to exceed one of its operating ratings. Operating rating Preliminary Terminology and guidelines Max ...

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... This is an example of an operating behavior that includes a typical value: K50 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. 8 Normal Limited operating operating range range - No permanent failure - No permanent failure - Correct operation - Possible decreased life - Possible incorrect operation Handling range - No permanent failure Preliminary Fatal range - Probable permanent failure ∞ Freescale Semiconductor, Inc. ...

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... Typical value conditions Typical values assume you meet the following conditions (or other conditions as specified): Symbol T Ambient temperature A V 3.3 V supply voltage DD 4 Ratings K50 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Min. Typ 1.00 1.05 1.10 V (V) DD Description Value 25 3.3 Preliminary Ratings Max ...

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... Min. -2000 -500 -100 Table continues on the next page... Preliminary Max. Unit Notes 150 °C 1 260 °C 2 245 Max. Unit Notes 3 — 1 Max. Unit Notes +2000 V 1 +500 V 2 +100 mA Min. Max. Unit –0.3 3.8 V — 185 mA –0.3 5.5 V Freescale Semiconductor, Inc. ...

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... V ≤ V ≤ 2 Input low voltage IL • 2.7 V ≤ V ≤ 3 • 1.7 V ≤ V ≤ 2 Input hysteresis HYS K50 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc Min. 1.71 1.71 –0.1 –0.1 1.71 0.7 × 0.75 × — — 0.06 × Table continues on the next page ...

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... TBD TBD Preliminary Max. Unit Notes –0.2 mA –5 mA — V — less than V IN Typ. Max. Unit Notes 1.1 TBD V 2.56 TBD V 2.70 TBD V 2.80 TBD V 2.90 TBD V 3.00 TBD 1.60 TBD V 1.80 TBD V 1.90 TBD V 2.00 TBD V 2.10 TBD 1.00 TBD V 1000 TBD μs Freescale Semiconductor, Inc The ...

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... R Internal pullup resistors PU R Internal pulldown resistors PD 1. Measured at VDD=3.6V 2. Measured at V supply voltage = Measured at V supply voltage = V DD K50 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Min. TBD Min. = -10mA V – 0 -3mA V – 0 -2mA V – ...

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... VLLSx→RUN recovery times in the following table Min. — DD — — — — — — — — — — — — Preliminary Max. Unit Notes 300 μs 1 4.1 μs 123.8 μs 4.1 μs 49.3 μs 4.1 μs 49.2 μs 4.1 μs 5.9 μs 4.1 μs 4.2 μs 4.1 μs 5.8 μs Freescale Semiconductor, Inc. ...

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... FlexBus and flash clock. MCG configured for FEI mode. K50 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Min. Typ. Max. ...

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... LVD disabled, USB regulator disabled • No GPIOs toggled • Code execution from flash Figure 1. Run mode supply current vs. core frequency — all peripheral clocks disabled The following data was measured under these conditions: K50 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. 16 Preliminary Freescale Semiconductor, Inc. ...

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... All peripheral clocks enabled but peripherals are not in active operation • LVD disabled, USB regulator disabled • No GPIOs toggled • Code execution from flash Figure 2. Run mode supply current vs. core frequency — all peripheral clocks enabled K50 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Preliminary General 17 ...

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... K50 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. 18 Frequency band (MHz) 0.15–50 50–150 150–500 500–1000 0.15–1000 = 96 MHz SYS Table 8. Capacitance attributes Preliminary Typ. Unit Notes TBD dBμ TBD TBD TBD TBD — Min. Max. Unit — — Freescale Semiconductor, Inc. ...

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... Slew disabled • Slew enabled 1. The greater synchronous and asynchronous timing must be met. 2. This is the shortest pulse that is guaranteed to be recognized. 3. 75pF load K50 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Min. Max. Normal run mode — 100 20 — ...

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... K50 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. 20 Min. –40 –40 121 MAPBGA TBD TBD TBD TBD TBD TBD TBD Preliminary Max. Unit 125 °C 85 °C Unit Notes °C/W 1 °C/W 1 °C/W 1 °C/W 1 °C/W 2 °C/W 3 °C/W 4 Freescale Semiconductor, Inc. ...

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... Clock and data fall time f T Data setup s T Data hold h Figure 3. TRACE_CLKOUT specifications TRACE_CLKOUT TRACE_D[3:0] Figure 4. Trace data specifications K50 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. Frequency dependent 2 2 — — Preliminary Max ...

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... Max. Unit 2.7 3.6 V MHz 1/J1 — — 20 — 10 — — — ns — — — — ns — — 100 — — ns Min. Max. Unit 1.71 3.6 V MHz 1/J1 — ns Freescale Semiconductor, Inc. ...

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... TCLK low to TDO high-Z J13 TRST assert time J14 TRST setup time (negation) to TCLK high TCLK (input) K50 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Figure 5. Test clock input timing Preliminary Min ...

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... K50 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011 J11 J12 J11 Figure 7. Test Access Port timing Preliminary J5 J6 Input data valid Output data valid Output data valid J9 J10 Input data valid Output data valid Output data valid Freescale Semiconductor, Inc. ...

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... VDD and 25°C f Internal reference frequency (fast clock) — user intf_t trimmed K50 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors J14 Figure 8. TRST timing Table 13. MCG specifications Min. Typ. ...

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... MHz 2, 50 MHz 75 MHz 100 MHz — MHz 4, — MHz — MHz — MHz TBD ps TBD ps — — 100 MHz 950 — µA — 4.0 MHz 400 — — Freescale Semiconductor, Inc ...

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... Supply current — low-power mode (HGO=0) DDOSC • 32 kHz • 4 MHz • 8 MHz • 16 MHz • 24 MHz • 32 MHz K50 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. Typ. ± 1.49 — ± 4.47 — — ...

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... MΩ — MΩ — — MΩ 1 — MΩ — — kΩ 200 — kΩ — — kΩ 0 — kΩ 0.6 — — 0.6 — — Freescale Semiconductor, Inc ...

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... Table 16. 32kHz oscillator DC electrical specifications Symbol Description V Supply voltage BAT R Internal feedback resistor F C Parasitical capacitance of EXTAL32 and XTAL32 para K50 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. Typ. 32 — 3 — 8 — — — — ...

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... K50 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. 30 Min. Typ. — 15 — 0.6 Min. Typ. Max. — 32 — — 1000 — Min. Typ. Max. — 20 TBD — 20 100 — 160 800 Preliminary Max. Unit — pF — V Unit Notes kHz ms 1 Unit Notes μ Freescale Semiconductor, Inc. ...

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... Table 21. NVM reliability specifications Symbol Description t Data retention after cycles nvmretp10k t Data retention after cycles nvmretp1k K50 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. Typ. — — — — — — ...

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... TBD — TBD — ≤ 125°C. j Min. 2.7 — — EZP_CK — 0 — Preliminary Unit Notes years 2 cycles 3 Max. Unit 3 MHz SYS f /8 MHz SYS — ns — ns — ns — ns — — Freescale Semiconductor, Inc. ...

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... Data and FB_TA input hold 1. Specification is valid for all FB_AD[31:0], FB_BE/BWEn, FB_CSn, FB_OE, FB_R/W,FB_TBST, FB_TSIZ[1:0], FB_ALE, and FB_TS. 2. Specification is valid for all FB_AD[31:0] and FB_TA. K50 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors EP3 EP2 EP4 ...

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... Peripheral operating requirements and behaviors FB1 FB_CLK FB_A[Y] FB2 FB_D[X] Address FB_RW FB_TS FB_ALE FB_CSn FB_OEn FB_BEn FB_TA FB_TSIZ[1:0] Figure 10. FlexBus read timing diagram K50 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. 34 FB3 FB5 Address FB4 Data AA=1 AA=0 FB4 FB5 AA=1 AA=0 TSIZ Preliminary Freescale Semiconductor, Inc. ...

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... FB_TSIZ[1:0] Figure 11. FlexBus write timing diagram 6.5 Security and integrity modules There are no specifications necessary for the device's security and integrity modules. 6.6 Analog K50 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors FB3 Address Data AA=1 ...

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... Table continues on the next page... Preliminary are achievable on the Table 26 and Max. Unit Notes 3.6 V +100 mV 2 +100 DDA V V SSA V V REFH kΩ kΩ 4 18.0 MHz 5 12.0 MHz Freescale Semiconductor, Inc. ...

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... For guidelines and examples of conversion rate calculation please download the ADC calculator tool http:// cache.freescale.com/files/soft_dev_tools/software/app_software/converters/ADC_CALCULATOR_CNV.zip?fpsp=1 7. For guidelines and examples of conversion rate calculation please download the ADC calculator tool http:// cache.freescale.com/files/soft_dev_tools/software/app_software/converters/ADC_CALCULATOR_CNV.zip?fpsp=1 K50 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. 1 Max. ...

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... ADC SAR ENGINE R ADIN R ADIN R ADIN R ADIN C ADIN , REFL SSA 2 Max. Unit Notes 1 — MHz ADACK f ADACK — MHz — MHz — MHz ±TBD ADC 4 LSB conversion ±1 clock <12MHz, Max hardware averaging (AVGE = %1, AVGS = %11) Freescale Semiconductor, Inc. ...

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... Avg=32 SFDR Spurious free 16 bit differential mode dynamic range • Avg=32 16 bit single-ended mode • Avg=32 K50 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors = REFH DDA REFL 1 Min. Typ. ...

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... SSA Table continues on the next page... Preliminary = V ) (continued) SSA 2 Max. Unit Notes leakage current (refer to the MCU's voltage and current operating ratings) — mV/°C — mV/°C — mV Max. Unit Notes 3 DDA V V DDA Freescale Semiconductor, Inc. ...

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... PGAG=5 • PGAG=6 BW Input signal • 16-bit modes bandwidth • < 16-bit modes PSRR Power supply Gain=1 rejection ration K50 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. 1 Typ. — 128 — 64 — 32 — ...

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... DDA to 3.6V TBD %/ leakage AS In current (refer to the MCU's voltage and current operating ratings × 0.583 — dB 16-bit differential — dB mode, Average=32 — dB 16-bit differential — dB mode, Average=32, f =500Hz in — dB 16-bit differential — dB mode, Average=32, f =500Hz in Freescale Semiconductor, Inc. ...

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... Supply current, High-speed mode (EN=1, PMODE=1) DDHS I Supply current, low-speed mode (EN=1, PMODE=0) DDLS V Analog input voltage AIN V Analog input offset voltage AIO K50 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. Typ. TBD 12.3 TBD 12.7 TBD 8.4 TBD 8.7 TBD 13 ...

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... V – 0.5 DD — 20 120 — 2 — –0.5 –0.3 -0.6V. DD Preliminary Typ. Max. Unit 5 — — — — mV — — V — 0 200 ns 250 600 ns — TBD ns 7 — μA — 0.5 3 LSB — 0.3 LSB Freescale Semiconductor, Inc. ...

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... Figure 15. Typical hysteresis vs. Vin level (VDD=3.3V, PMODE=0) K50 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors 1 1.3 1.6 1.9 2.2 Vin level (V) Preliminary HYSTCTR S etting 2.5 2.8 3.1 45 ...

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... A small load capacitance (47 pF) can improve the bandwidth performance of the DAC K50 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011 1.3 1.6 1.9 2.2 Vin level (V) Min. 1.71 1.13 −40 — — Preliminary HYSTCTR Setting 2.5 2.8 3.1 Max. Unit Notes 3 105 °C 100 Freescale Semiconductor, Inc. ...

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... Settling within ±1 LSB 2. The INL is measured for 0+100mV The DNL is measured for 0+100 The DNL is measured for 0+100mV to V K50 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. Typ. — ...

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... Peripheral operating requirements and behaviors 5. Calculated by a best fit curve from V Figure 17. Typical INL error vs. digital code K50 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. 48 +100 mV to VREF−100 mV SS Preliminary Freescale Semiconductor, Inc. ...

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... VOS I Input offset current (0~50° Input offset current (-40~105° Input bias current (0~50°C) BIAS K50 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. 1.71 — — — — — — — ...

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... MHz — — MHz 90 — dB — TBD pF — TBD Ω — TBD V ±0.5 — — — deg TBD — μs TBD — μs 350 TBD nV/√Hz 90 TBD nV/√Hz Max. Unit Notes 3 -1.4 V DDA 100 pf 1500 Ω Freescale Semiconductor, Inc. ...

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... Voltage noise density (noise floor) 1kHz Vn Voltage noise density (noise floor) 10kHz Figure 19. Typical Open Loop Gain vs. Frequency [TBD] Figure 20. Typical Phase vs. Frequency [TBD] K50 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. Typ. Max. — ...

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... Min. Max. 1.71 3.6 −40 105 — 100 Preliminary Unit Notes Ω Unit Notes mV μV MΩ V/μs V/μs MHz MHz dB dB deg Unit Notes V °C nF Freescale Semiconductor, Inc. ...

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... Voltage reference output with factory trim out TBD Figure 21. Typical output vs.temperature TBD 6.7 Timers See General switching specifications. K50 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. TBD TBD 1.198 — — — — ...

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... Table continues on the next page... Preliminary Typ. Max. Unit TBD TBD V — 2 μA 100 150 μA — 24.8 kΩ TBD 0.4 V Max. Unit Notes 5.5 V TBD μA TBD μA — nA TBD μA 120 Freescale Semiconductor, Inc. ...

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... The DSPI module can operate across the entire operating voltage for the processor, but to run across the full voltage range the maximum frequency of operation is reduced. K50 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. ...

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... Data DS14 First data Data Preliminary DS4 Min. Max. Unit 1.71 3.6 V — 6.25 MHz — ns BCLK (t / SCK SCK/2) — — — — ns — — DS9 DS16 DS11 Last data Last data Freescale Semiconductor, Inc. ...

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... Table 45. Slave mode DSPI timing (high-speed mode) Num Operating voltage Frequency of operation DS9 DSPI_SCK input cycle time DS10 DSPI_SCK input high/low time K50 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Description DS1 DS2 DS8 Data Last data First data ...

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... K50 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. 58 Description DS10 DS15 DS12 First data Data DS14 First data Data Preliminary Min. Max. Unit — TBD ns 0 — — — ns — — DS9 DS16 DS11 Last data Last data Freescale Semiconductor, Inc. ...

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... SDHC input hold time THL SDHC_CLK Output SDHC_CMD Output SDHC_DAT[3:0] Input SDHC_CMD Input SDHC_DAT[3:0] K50 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Card input clock SD3 SD2 SD1 SD6 SD7 SD8 Figure 27. SDHC timing Preliminary Min ...

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... S10 2 S timing — master mode Preliminary Min. Max. Unit 2.7 3 SYS 45% 55% MCLK period — ns SYS 45% 55% BCLK period — -2.5 — ns — — — — S10 S8 Freescale Semiconductor, Inc. ...

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... DDTSI C Target electrode capacitance range ELE f Reference oscillator frequency REFmax f Electrode oscillator frequency ELEmax K50 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Table 48 slave mode timing S11 S12 S15 S16 S18 2 S timing — ...

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... REFCHRG = 4 128, REF http://www.freescale.com and perform a keyword Then use this document number TBD Preliminary Max. Unit Notes TBD pF TBD mV TBD μA 2 TBD μA 2 TBD % 3 TBD % 4 TBD % 5 — fF/count 6 — fF/count 7 16 bits 25 μs 8 — μA TBD μA Freescale Semiconductor, Inc. ...

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... ADC0_DM0/ ADC0_DM0/ ADC1_DM3 ADC1_DM3 ADC1_DM3 • PGA1_DP/ PGA1_DP/ PGA1_DP/ ADC1_DP0/ ADC1_DP0/ ADC1_DP0/ ADC0_DP3 ADC0_DP3 ADC0_DP3 K50 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. ALT1 ALT2 ALT3 ALT4 SPI1_PCS1 UART1_TX SDHC0_D1 SPI1_SOUT UART1_RX SDHC0_D0 SPI1_SCK UART1_CTS SDHC0_DCL _b K SPI1_SIN ...

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... XTAL32 • EXTAL32 EXTAL32 EXTAL32 • VBAT VBAT VBAT • PTA0 JTAG_TCLK/ TSI0_CH1 SWD_CLK/ EZP_CLK K50 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. 64 ALT1 ALT2 ALT3 ALT4 PTA0 UART0_CTS FTM0_CH5 _b Preliminary ALT5 ALT6 ALT7 EzPort JTAG_TCLK/ EZP_CLK SWD_CLK Freescale Semiconductor, Inc. ...

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... ADC0_SE13/ ADC0_SE13/ TSI0_CH8 TSI0_CH8 • PTB6 /ADC1_SE12 /ADC1_SE12 PTB6 • PTB7 /ADC1_SE13 /ADC1_SE13 PTB7 • PTB8 K50 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. ALT1 ALT2 ALT3 ALT4 PTA1 UART0_RX FTM0_CH6 PTA2 UART0_TX FTM0_CH7 PTA3 UART0_RTS FTM0_CH0 _b ...

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... I2S0_RXD Preliminary ALT5 ALT6 ALT7 EzPort FB_AD20 FB_AD19 FTM0_FLT1 FB_AD18 FTM0_FLT2 FB_AD17 EWM_IN FB_AD16 EWM_OUT_ b FB_AD15 FTM2_QD_P HA FTM2_QD_P HB FB_AD31 CMP0_OUT FB_AD30 CMP1_OUT FB_AD29 CMP2_OUT FB_AD28 FB_AD14 FB_AD13 FB_AD12 FB_CLKOUT FB_AD11 CMP1_OUT FB_AD10 CMP0_OUT FB_AD9 FB_AD8 FB_AD6 FTM2_FLT0 FB_RW_b Freescale Semiconductor, Inc. ...

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... DISABLED • PTD10 DISABLED • PTD11 DISABLED • PTD12 DISABLED • PTD13 DISABLED • PTD14 DISABLED K50 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. ALT1 ALT2 ALT3 ALT4 PTC12 UART4_RTS _b PTC13 UART4_CTS _b PTC14 UART4_RX PTC15 UART4_TX PTC16 UART3_RX ...

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... Added sections that were inadvertently removed in previous revision Reworded I footnote in "Voltage and Current Operating Requirements" IC table. Added paragraph to "Peripheral operating requirements and behaviors" section. Added "JTAG full voltage range electricals" table to the "JTAG electricals" section. Preliminary ALT5 ALT6 ALT7 EzPort FB_A23 Freescale Semiconductor, Inc. ...

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... For further information, see http://www.freescale.com or contact your Freescale sales representative. For information on Freescale's Environmental Products program http://www.freescale.com/epp. Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2010–2011 Freescale Semiconductor, Inc. ...