pbl386141 ETC-unknow, pbl386141 Datasheet - Page 16

• Manufacturer Part Number: pbl386141
• Description: Pbl 386 14/1 Subscriber Line Interface Circuit
• Manufacturer: ETC-unknow

PBL 386 14/1
Line Voltage measurement
The line voltage is presented on the detec-
tor output as a pulse train (see Figure 15)
with a frequency inversely proportional to
the voltage according to the equation:
started when entering this state from any
other state and the SLIC will be as in active
state except for the detector. The data can
be used in variety of ways, for example to
set transmission parameters in a program-
mable CODEC, in line testing where short
circuits on the line can be detected and to
control the metering signal amplitude.
Overvoltage Protection
PBL 386 14/1 must be protected against
overvoltages on the telephone line. The
overvoltages could be caused for instance
by lightning, ac power contact and induc-
tion. Refer to Maximum Ratings, TIPX and
RINGX terminals, for maximum continu-
ous and transient voltages.
Secondary Protection
The circuit shown in Figure 14 utilizes series
resistors together with a programmable
overvoltage protector (e g Power Innova-
tions TISP PBL2), serving as a secondary
protection.
ducting buffered p-gate overvoltage pro-
tector. The protector gate references the
protection (clamping) voltage to negative
supply voltage (i.e. the battery voltage, V
As the protection voltage will track the
negative supply voltage the overvoltage
stress on the SLIC is minimized.
ground by a diode. Negative overvoltages
are initially clamped close to the SLIC neg-
ative supply rail voltage and the protector
will crowbar into a low voltage on-state
condition, by firing an internal thyristor.
16
freq =
The line voltage measurement will be
The TISP PBL2 is a dual forward-con-
Positive overvoltages are clamped to
|V
10
TR
| + 1
6
[Hz]
B
).
ed to carry enough charge to supply a high
enough current to quickly turn on the thyris-
tor in the protector. C
close to the overvoltage protection device.
Without the capacitor even the low induc-
tance in the track to the V
the current and delay the activation of the
thyristor clamp.
purposes of being non- destructive
energy dissipators, when transients are
clamped and of being fuses, when the
line is exposed to a power cross. If a
PTC is chosen for R
important to always use the PTC´s in
series with resistors not sensitive to
temperature, as the PTC will act as a
capacitance for fast transients and
therefore will not protect the TISP.
Figure 15. Line voltage measurment
A gate decoupling capacitor, C
The fuse resistors R
F
GG
, note that it is
F
serve the dual
should be placed
B
supply will limit
GG
, is need-
Power-up Sequence
No special power-up sequence is neces-
sary except that ground has to be present
before all other power supply voltages.
pull-up terminals.
Printed Circuit Board Layout
Care in Printed Circuit Board (PCB) layout
is essential for proper function;
input should be placed in close proximity to
that pin, such that no interference is inject-
ed into the RSN pin. Ground plane sur-
rounding the RSN pin is advisable.
nected to battery ground (BGND) on the
PCB in one point.
AGND with short leads. Pin LP and pin
PSG are sensitive to leakage currents.
be short and very close to each other.
wide leads.
The digital inputs C1 to C3 are internal
The components connecting to the RSN
Analog ground (AGND) should be con-
R
R
C
LC
SG
B
and C
and C
and R
B2
LP
REF
must be connected with short
connections to VBAT2 should
should be connected to