adl5391acpz-wp Analog Devices, Inc., adl5391acpz-wp Datasheet

adl5391acpz-wp

Manufacturer Part Number

adl5391acpz-wp

Description

Dc To 2.0 Ghz Multiplier

Manufacturer

Analog Devices, Inc.

Datasheet

1.ADL5391ACPZ-WP.pdf (16 pages)

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FEATURES

Ultrafast symmetric multiplier

Unique design ensures absolute XY-symmetry

Adjustable gain scaling, α

DC-coupled throughout, 3 dB bandwidth of 2 GHz

Fully differential inputs, may be used single ended

Low noise, high linearity

Accurate, temperature stable gain scaling

Single-supply operation (4.5 V to 5.5 V @ 130 mA)

Low current power-down mode

16-lead LFCSP

APPLICATIONS

Wideband multiplication and summing

High frequency analog modulation

Adaptive antennas (diversity/phased array)

Square-law detectors and true rms detectors

Accurate polynomial function synthesis

DC capable VGA with very fast control

GENERAL DESCRIPTION

The ADL5391 draws on three decades of experience in

advanced analog multiplier products. It provides the same

general mathematical function that has been field proven to

provide an exceptional degree of versatility in function synthesis.

The most significant advance in the ADL5391 is the use of a

new multiplier core architecture, which differs markedly from

the conventional form that has been in use since 1970. The

conventional structure that employs a current mode, translinear

core is fundamentally asymmetric with respect to the X and Y

inputs, leading to relative amplitude and timing misalignments

that are problematic at high frequencies. The new multiplier

core eliminates these misalignments by offering symmetric

signal paths for both X and Y inputs. The Z input allows a signal

to be added directly to the output. This can be used to cancel a

carrier or to apply a static offset voltage.

The fully differential X, Y, and Z input interfaces are operational

over a ±2 V range, and they can be used in single-ended fashion.

The user can apply a common mode at these inputs to vary

from the internally set V

Rev. 0

Information furnished by Analog Devices is believed to be accurate and reliable. However, no

responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other

rights of third parties that may result from its use. Specifications subject to change without notice. No

license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

Trademarks and registered trademarks are the property of their respective owners.

Function: V

Identical X and Y amplitude/timing responses

= α × (V

× V

)/ 1 V + V

POS

× V

/2 down to ground. If these inputs

)/1 V + V

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: 781.329.4700

Fax: 781.461.3113

are ac-coupled, their nominal voltage will be V

interfaces each present a differential 500 Ω input impedance up to

approximately 700 MHz, decreasing to 50 Ω at 2 GHz. The gain

scaling input, GADJ, can be used for fine adjustment of the gain

scaling constant (α) about unity.

The differential output can swing ±2 V about the V

common-mode and can be taken in a single-ended fashion as

well. The output common mode is designed to interface directly

to the inputs of another ADL5391. Light dc loads can be ground

referenced; however, ac-coupling of the outputs is recommended

for heavy loads.

The ENBL pin allows the ADL5391 to be disabled quickly to a

standby mode. It operates off supply voltages from 4.5 V to

5.5 V while consuming approximately 130 mA.

The ADL5391 is fabricated on Analog Devices proprietary, high

performance, 65 GHz, SOI complementary, SiGe bipolar IC

process. It is available in a 16-lead, Pb-free, LFCSP and operates

over a −40°C to +85°C temperature range. Evaluation boards

are available.

XMNS

ENBL

XPLS

VMID

FUNCTIONAL BLOCK DIAGRAM

YMNS YPLS

COMM VPOS

Figure 1.

GADJ

W = αXY/1V+Z

ADL5391

DC to 2.0 GHz

Multiplier

ADL5391

POS

www.analog.com

ZMNS

ZPLS

WPLS

WMNS

/2. These input

POS

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adl5391acpz-wp Summary of contents

Page 1

... It is available in a 16-lead, Pb-free, LFCSP and operates over a −40°C to +85°C temperature range. Evaluation boards are available. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 Fax: 781.461.3113 ©2006 Analog Devices, Inc. All rights reserved. Multiplier ADL5391 ZMNS ZPLS WPLS WMNS /2 ...

Page 2

ADL5391 TABLE OF CONTENTS Features .............................................................................................. 1 Applications....................................................................................... 1 Functional Block Diagram .............................................................. 1 General Description ......................................................................... 1 Revision History ............................................................................... 2 Specifications..................................................................................... 3 Absolute Maximum Ratings............................................................ 5 ESD Caution.................................................................................. 5 Pin Configuration and Function Descriptions............................. 6 REVISION HISTORY 7/06—Revision ...

Page 3

SPECIFICATIONS 25° Ω differential, ZPLS = ZMNS = open, GADJ = open, unless otherwise noted. Transfer function POS common mode internally set to ...

Page 4

ADL5391 Parameter OIP3 OIP2 Output 1 dB Compression Point Group Delay Differential Gain Error, X/Y Differential Phase Error, X/Y GAIN TRIMMING (α) Nominal Bias Input Range Gain Adjust Range REFERENCE VOLTAGE Source Current POWER AND ENABLE Supply Voltage Range Total ...

Page 5

ABSOLUTE MAXIMUM RATINGS Table 2. Parameter Supply Voltage V POS ENBL XPLS, XMNS, YPLS, YMNS, ZPLS, ZMNS GADJ Internal Power Dissipation θ (With Pad Soldered to Board) JA Maximum Junction Temperature Operating Temperature Range Storage Temperature Range Lead Temperature (Soldering ...

Page 6

ADL5391 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS Table 3. Pin Function Descriptions Pin No. Mnemonic Description 1, 7 COMM Device Common. Connect via lowest possible impedance to external circuit common Positive Supply Voltage. 4 5.5 ...

Page 7

TYPICAL PERFORMANCE CHARACTERISTICS GADJ = open. 3 –2 2 – 2 1.5 1.0 0.5 0 –0.5 –1.0 –1.5 –2.0 –2.5 –3.0 –2.5 –2.0 –1.5 –1.0 –0.5 0 ...

Page 8

ADL5391 0.20 X ± INPUT = ±100mV p-p, @ 200MHz Y ± INPUT = 1.0V DC DIFFERENTIAL 0.15 0.10 0.05 0 –0.05 –0.10 –0.15 –0.20 24.5 25.5 26.5 27.5 28.5 29.5 TIME (ns) Figure 9. Small Signal Pulse Response 10MHz ...

Page 9

S11 SE 1.00UFS S11 DIFF 1.000 201.000 0.654 U –36.340 DEG 1001.000 0.594 U –92.533 DEG 1901.000 0.531 U –94.448 DEG 201.000 0.800 U –17.218 DEG 2001.000 0.564 U –58.167 DEG Figure 15. Input S11 1.00UFS 3001.000 1.000 Rev. 0 ...

Page 10

ADL5391 GENERAL DESCRIPTION BASIC THEORY The multiplication of two analog variables is a fundamental signal processing function that has been around for decades. By convention, the desired transfer function is given αXY where: X and ...

Page 11

Matching the Input/Output The input and output impedance’s of the ADL5391 change over frequency, making it difficult to match over a broad frequency range (see Figure 15 and Figure 16). The evaluation board is matched for lower frequency operation, and ...

Page 12

ADL5391 0 BLEEDTHRU GAIN –5 –10 SECOND HARMONIC GAIN –15 –20 –25 –30 –35 –40 –45 THIRD HARMONIC GAIN –50 –55 –60 –65 10 100 200 300 400 500 600 FREQUENCY (MHz) Figure 18. Single-Ended (DC) ADL5391 Used as a ...

Page 13

EVALUATION BOARD C16 OPEN YP_DC C7 TP6 0.1µ TC1-1-13M OPEN YM J7 C18 YM_DC 0.1µF TP7 C19 OPEN XP_DC C4 TP8 0.1µ TC1-1-13M 56.2Ω OPEN XM J9 R17 OPEN XM_DC C20 0.1µF ...

Page 14

... TP12, TP14 Black test loops. TP3, TP10, TP11 Yellow test loops. DUT ADL5391. Part Number TC1-1-13M+ Mini-Circuits ADL5391ACPZ Rev Page Default Value WP, ZP, YP, XP WM, ZM, YM, XM GADJ T3 and T4 are populated, but the Y and Z inputs are set up for dc operation. 0.1 μF, 0402 capacitors Open, 0402 capacitors 0 Ω ...

Page 15

... OUTLINE DIMENSIONS PIN 1 INDICATOR 12° MAX 0.90 0.85 0.80 SEATING PLANE ORDERING GUIDE Model Temperature Range ADL5391ACPZ-R2 1 −40°C to +85°C 1 ADL5391ACPZ-R7 −40°C to +85°C 1 ADL5391ACPZ-WP −40°C to +85°C 1 ADL5391-EVALZ Pb-free part. 3.00 0.60 MAX BSC SQ 0. 2.75 TOP BSC SQ VIEW 9 (BOTTOM VIEW) 0.50 8 BSC 1 ...

Page 16

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