tda6405ts NXP Semiconductors, tda6405ts Datasheet - Page 8

• Manufacturer Part Number: tda6405ts
• Description: 5 V Mixer/oscillator-pll Synthesizers For Hyperband Tuners
• Manufacturer: NXP Semiconductors

Philips Semiconductors
Table 4 Address selection I
Table 5 Test mode
Notes
1. This is the default mode at Power-on reset.
2. The ADC input cannot be used when these test modes are active.
Table 6 Reference divider ratio select bits
Read mode
Data can be read from the devices by setting the R/W bit
to logic 1 (see Tables 7 and 8). After the slave address
has been recognized, the devices generate an
acknowledge pulse and the first data byte (status byte) is
transferred on the SDA line (MSB first). Data is valid on the
SDA line during a HIGH-level of the SCL clock signal.
A second data byte can be read from the devices if the
processor generates an acknowledge on the SDA line
(master acknowledge). End of transmission will occur if no
master acknowledge occurs. The devices will then release
the data line to allow the processor to generate a STOP
condition. The POR flag is set to logic 1 at power-on.
The flag is reset when an end-of-data is detected by the
devices (end of a read sequence). Control of the loop is
made possible with the in-lock flag FL which indicates
when the loop is locked (FL = 1).
1999 Jan 13
5 V mixer/oscillator-PLL synthesizers for
hyperband tuners
MA1
T2
0
0
1
1
0
0
0
1
1
1
1
RSA
X
0
1
MA0
T1
0
1
0
1
0
0
1
1
1
0
0
0 to 0.1V
open or 0.2V
0.4V
0.9V
RSB
0
1
1
2
C-bus
T0
CC
CC
X
0
1
0
1
0
1
to 0.6V
to 1.0V
CC
automatic charge pump off
automatic charge pump on; note 1
charge pump is ‘OFF’
charge pump is sinking current
charge pump is sourcing current
f
1
CC
REF
2
CC
CC
f
DIV
to 0.3V
REFERENCE DIVIDER RATIO
is available on pin ADC; note 2
is available on pin ADC; note 2
CC
VOLTAGE APPLIED ON AS INPUT
1024
640
512
8
The ACPS flag is LOW when the automatic charge pump
switch mode is ‘ON’ and the loop is locked. In other
conditions, ACPS = 1. When ACPS = 0, the charge pump
current is forced to the LOW value.
A built-in ADC is available on ADC pin. This converter can
be used to apply AFC information to the controller from the
IF section of the television. The relationship between the
bits A2, A1 and A0 is given in Table 9.
TEST MODES
TDA6404; TDA6405;
FREQUENCY STEP (kHz)
3.90625
7.8125
6.25
Product specification
TDA6405A