MC100LVEL29DWG ON Semiconductor, MC100LVEL29DWG Datasheet

MC100LVEL29DWG

Manufacturer Part Number

MC100LVEL29DWG

Description

IC FLIP FLOP DUAL ECL DFF 20SOIC

Manufacturer

ON Semiconductor

Series

100LVELr

Type

D-Typer

Datasheet

1.MC100LVEL29DWG.pdf (6 pages)

Specifications of MC100LVEL29DWG

Function

Set(Preset) and Reset

Output Type

Differential

Number Of Elements

Number Of Bits Per Element

Frequency - Clock

1.1GHz

Delay Time - Propagation

580ps

Trigger Type

Positive Edge

Voltage - Supply

3 V ~ 3.8 V

Operating Temperature

-40°C ~ 85°C

Mounting Type

Surface Mount

Package / Case

20-SOIC (7.5mm Width)

Number Of Circuits

Logic Family

100

Logic Type

D-Type Flip-Flop

Polarity

Inverting/Non-Inverting

Input Type

Differential

Propagation Delay Time

0.7 ns

Supply Voltage (max)

- 3.8 V, 3.8 V

Maximum Operating Temperature

+ 85 C

Mounting Style

SMD/SMT

Minimum Operating Temperature

- 40 C

Supply Voltage (min)

- 3 V or 3 V

Technology

ECL

Number Of Bits

Number Of Elements

Clock-edge Trigger Type

Posit/Negat-Edge

Operating Supply Voltage (typ)

-3.3/3.3V

Package Type

SOIC W

Low Level Output Current

50mA

High Level Output Current

50mA

Frequency (max)

1.1GHz

Operating Supply Voltage (min)

-3/3V

Operating Supply Voltage (max)

-3.8/3.8V

Operating Temp Range

-40C to 85C

Operating Temperature Classification

Industrial

Mounting

Surface Mount

Pin Count

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

Current - Output High, Low

Lead Free Status / Rohs Status

Lead free / RoHS Compliant

Other names

MC100LVEL29DWGOS

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MC100LVEL29

3.3V ECL Dual Differential

Data and Clock D Flip-Flop

With Set and Reset

Description

features fully differential Data and Clock inputs as well as outputs.

The MC100LVEL29 is pin and functionally equivalent to the

MC100EL29. Data enters the master latch when the clock is LOW and

transfers to the slave upon a positive transition on the clock input.

stability under open input conditions. When both differential inputs

are left open the D input will pull down to V

bias around V

state will be random based on how the flip flop powers up.

inputs. Note that the Set and Reset inputs cannot both be HIGH

simultaneously.

this device only. For single-ended input conditions, the unused

differential input is connected to V

and V

to 0.5 mA. When not used, V

Features

•

*For additional information on our Pb−Free strategy and soldering details, please

November, 2008 − Rev. 6

download the ON Semiconductor Soldering and Mounting Techniques

Reference Manual, SOLDERRM/D.

The MC100LVEL29 is a dual master−slave flip flop. The device

The differential inputs have special circuitry which ensures device

Both flip flops feature asynchronous, overriding Set and Reset

The V

with V

For Additional Information, see Application Note AND8003/D

Oxygen Index: 28 to 34

1100 MHz Flip−Flop Toggle Frequency

ESD Protection: >2 kV Human Body Model

580 ps Typical Propagation Delays

The 100 Series Contains Temperature Compensation

PECL Mode Operating Range: V

NECL Mode Operating Range: V

Internal Input Pulldown Resistors

Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test

Moisture Sensitivity Pb = Level 1

Flammability Rating: UL 94 V−0 @ 0.125 in,

Transistor Count = 313 devices

Pb−Free Packages are Available*

may also rebias AC coupled inputs. When used, decouple V

via a 0.01 mF capacitor and limit current sourcing or sinking

pin, an internally generated voltage supply, is available to

= −3.0 V to −3.8 V

= 0 V

/2. The outputs will go to a defined state, however the

Pb−Free = Level 3

should be left open.

as a switching reference voltage.

= 3.0 V to 3.8 V

= 0 V

and the D input will

*For additional marking information, refer to

See detailed ordering and shipping information in the package

dimensions section on page 5 of this data sheet.

Application Note AND8002/D.

ORDERING INFORMATION

MARKING DIAGRAM*

http://onsemi.com

AWLYYWWG

= Assembly Location

= Wafer Lot

= Year

= Work Week

= Pb−Free Package

DW SUFFIX

CASE 751D

SO−20 WB

100LVEL29

Publication Order Number:

MC100LVEL29/D

Related parts for MC100LVEL29DWG

MC100LVEL29DWG Summary of contents

Page 1

... Transistor Count = 313 devices • Pb−Free Packages are Available* *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. © Semiconductor Components Industries, LLC, 2008 November, 2008 − Rev. 6 and the D input will switching reference voltage ...

Page 2

Warning: All V to Power Supply to guarantee proper operation. Figure 1. Logic Diagram and Pinout: 20-Lead SOIC (Top View) Table 1. PIN DESCRIPTION PIN FUNCTION D0, D0; D1, D1 ...

Page 3

Table 4. LVPECL DC CHARACTERISTICS Symbol Characteristic I Power Supply Current EE V Output HIGH Voltage (Note Output LOW Voltage (Note Input HIGH Voltage (Single−Ended Input LOW Voltage (Single−Ended Output ...

Page 4

Table 6. AC CHARACTERISTICS V CC Symbol Characteristic f Maximum Toggle Frequency max t Propagation Delay PLH t to Output PHL t Setup Time S t Hold Time H t Set/Reset Recovery RR t Minimum Pulse Width PW CLK, Set, ...

Page 5

... ORDERING INFORMATION Device MC100LVEL29DW MC100LVEL29DWG MC100LVEL29DWR2 MC100LVEL29DWR2G †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. Resource Reference of Application Notes AN1405/D AN1406/D AN1503/D AN1504/D AN1568/D AN1672/D AND8001/D − Odd Number Counters Design AND8002/D − ...

Page 6

... Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303− ...

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