74ac11scx-nl Fairchild Semiconductor, 74ac11scx-nl Datasheet

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74ac11scx-nl

Manufacturer Part Number
74ac11scx-nl
Description
74ac11 Triple 3-input And Gate
Manufacturer
Fairchild Semiconductor
Datasheet
© 2005 Fairchild Semiconductor Corporation
74AC11SC
74AC11SJ
74AC11MTC
74AC11MTCX_NL
(Note 1)
74AC11PC
74AC11
Triple 3-Input AND Gate
General Description
The AC11 contains three 3-input AND gates.
Ordering Code:
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Pb-Free package per JEDEC J-STD-020B.
Note 1: “_NL” indicates Pb-Free package (per JEDEC J-STD-020B). Device available in Tape and Reel only.
Logic Symbol
Pin Descriptions
FACT
Order Number
¥
is a trademark of Fairchild Semiconductor Corporation.
Package Number
MTC14
MTC14
IEEE/IEC
M14D
M14A
N14A
O
A
n
n
, B
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Pb-Free 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153,
4.4mm Wide
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Pin Names
n
, C
n
DS009916
Inputs
Outputs
Features
Connection Diagram
I
Outputs source/sink 24 mA
CC
Description
reduced by 50%
Package Description
November 1988
Revised February 2005
www.fairchildsemi.com

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74ac11scx-nl Summary of contents

Page 1

... Note 1: “_NL” indicates Pb-Free package (per JEDEC J-STD-020B). Device available in Tape and Reel only. Logic Symbol IEEE/IEC Pin Descriptions Pin Names ¥ FACT is a trademark of Fairchild Semiconductor Corporation. © 2005 Fairchild Semiconductor Corporation Features I reduced by 50% CC Outputs source/sink 24 mA Package Description Connection Diagram Description , C Inputs n ...

Page 2

Absolute Maximum Ratings Supply Voltage ( Input Diode Current ( 0. 0. Input Voltage ( Output Diode Current (I ...

Page 3

AC Electrical Characteristics Symbol Parameter t Propagation Delay PLH t Propagation Delay PHL r Note 6: Voltage Range 3.3 is 3.3V 0.3V r Voltage Range 5.0 is 5.0V 0.5V Capacitance Symbol Parameter C Input Capacitance IN C Power Dissipation Capacitance ...

Page 4

Physical Dimensions inches (millimeters) unless otherwise noted 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow www.fairchildsemi.com Package Number M14A 4 ...

Page 5

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M14D 5 www.fairchildsemi.com ...

Page 6

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide www.fairchildsemi.com Package Number MTC14 6 ...

Page 7

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right ...

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