m35072-059fp Mitsumi Electronics, Corp., m35072-059fp Datasheet - Page 4

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m35072-059fp

Manufacturer Part Number
m35072-059fp
Description
Screen Character Pattern Display Controllers
Manufacturer
Mitsumi Electronics, Corp.
Datasheet
MEMORY CONSTITUTION
Address 000
120
ternal circuit is reset and all display control registers (address 120
to 128
is not erased and be undefinited. This memory is consisted of 2
4
Fig. 1 Memory constitution (page 0 memory)
Addresses
11E
11F
000
001
120
121
122
123
124
125
126
127
128
16
16
to 128
16
16
16
16
16
16
16
16
16
16
16
16
16
) are set to “0” when the AC pin level is “L”. And then, RAM
16
16
DAF
are assigned to the display control registers. The in-
to 11F
0
0
0
0
0
0
0
0
0
0
0
0
0
EXCK0 VJT
EXCK1 TEST3 TEST2 TEST1 TEST0 VP9
RSEL0 PTD7 PTD6 PTD5 PTD4 PTD3 PTD2 PTD1 PTD0 PTC5 PTC4 PTC3 PTC2 PTC1 PTC0
TEST10 VSZ1H1 VSZ1H0 VSZ1L1 VSZ1L0 V1SZ1 V1SZ0 LIN9
MODE0 TEST12 HSZ20 TEST11 HSZ10 BETA14 TEST8 TEST7 TEST6
MODE1 BLINK2 BLINK1 BLINK0 DSPON STOP RAMERS SYAD BLK1
TEST9 TEST5 TEST4 DSP11 DSP10 DSP9 DSP8 DSP7 DSP6 DSP5 DSP4 DSP3 DSP2 DSP1 DSP0
TEST13 VSZ2H1 VSZ2H0 VSZ2L1 VSZ2L0 V18SZ1 V18SZ0 LIN17 LIN16 LIN15 LIN14 LIN13 LIN12 LIN11 LIN10
RSEL1 SPACE2 SPACE1 SPACE0 HP10
16
DAE
BB
BB
BB
BB
are assigned to the display RAM, address
Background
coloring
DAD
BG
BG
BG
BG
__
DIVS1 DIVS0 DIV10 DIV9
DAC
BR
BR
BR
BR
BLINK
BLINK
BLINK
BLINK
Blink-
DAB
ing
DAA
B
B
B
B
Character color
DA9
HP9
G
G
G
G
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
16
DIV8
DA8
HP8
VP8
R
R
R
R
pages : page 0 memory and page 1 memory (their addresses are
common), page controlled by DAF bit of each address when writing
data. For detail, see “Data input”. Memory constitution is shown in
Figure 1 and 2.
DIV7
DA7
HP7
VP7
C7
C7
C7
C7
DIV6
LIN8
DA6
HP6
VP6
C6
C6
C6
C6
BLK0 POLH POLV VMASK
DIV5
LIN7
DA5
HP5
VP5
C5
C5
C5
C5
FB
MITSUBISHI MICROCOMPUTERS
Character code
DIV4
LIN6
DA4
HP4
VP4
FG
C4
C4
C4
C4
M35072-XXXFP
DIV3
LIN5
DA3
HP3
VP3
FR
C3
C3
C3
C3
DIV2
LIN4
DA2
HP2
VP2
RB
C2
C2
C2
C2
DIV1
LIN3
DA1
HP1
VP1
RG
B/F
C1
C1
C1
C1
BCOL
DIV0
LIN2
DA0
HP0
VP0
RR
C0
C0
C0
C0

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