DM74LS534N Fairchild Semiconductor, DM74LS534N Datasheet
DM74LS534N
Specifications of DM74LS534N
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DM74LS534N Summary of contents
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... Clock (CP) and Output Enable (OE) is common to all flip-flops. The DM74LS534 is the same as the DM74LS374 except that the outputs are inverted. Ordering Code: Order Number Package Number DM74LS534N N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Logic Symbol V Pin 20 ...
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Functional Description The DM74LS534 consists of eight edge-triggered flip-flops with individual D-type inputs and 3-STATE true outputs. The buffered clock and buffered Output Enable are com- mon to all flip-flops. The eight flip-flops will store the state of their individual ...
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Absolute Maximum Ratings Supply Voltage Input Voltage Operating Free Air Temperature Range Storage Temperature Range Recommended Operating Conditions Symbol Parameter V Supply Voltage CC V HIGH Level Input Voltage IH V LOW Level Input Voltage IL V HIGH Level Output ...
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Switching Characteristics Symbol Parameter f Maximum Clock Frequency MAX t Propagation Delay PLH PHL n t Output Enable Time PZH t PZL t Output Disable Time PHZ t PLZ www.fairchildsemi.com V 5.0V ...
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Physical Dimensions inches (millimeters) unless otherwise noted 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at ...