74avch2t45 NXP Semiconductors, 74avch2t45 Datasheet

74avch2t45

Manufacturer Part Number

74avch2t45

Description

Dual-bit, Dual-supply Voltage Level Translator/transceiver; 3-state

Manufacturer

NXP Semiconductors

Datasheet

1.74AVCH2T45.pdf (29 pages)

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1. General description

2. Features

The 74AVCH2T45 is a dual bit, dual supply transceiver that enables bidirectional level

translation. It features two data input-output ports (nA and nB), a direction control input

(DIR) and dual supply pins (V

any voltage between 0.8 V and 3.6 V making the device suitable for translating between

any of the low voltage nodes (0.8 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V and 3.3 V). Pins nA and DIR

are referenced to V

transmission from nA to nB and a LOW on DIR allows transmission from nB to nA.

The device is fully speciﬁed for partial power-down applications using I

circuitry disables the output, preventing any damaging backﬂow current through the

device when it is powered down. In suspend mode when either V

GND level, both A and B are in the high-impedance OFF-state.

The 74AVCH2T45 has active bus hold circuitry which is provided to hold unused or

ﬂoating data inputs at a valid logic level. This feature eliminates the need for external

pull-up or pull-down resistors.

74AVCH2T45

Dual-bit, dual-supply voltage level translator/transceiver;

3-state

Rev. 01 — 3 July 2007

Wide supply voltage range:

High noise immunity

Complies with JEDEC standards:

ESD protection:

Maximum data rates:

JESD8-12 (0.8 V to 1.3 V)

JESD8-11 (0.9 V to 1.65 V)

JESD8-7 (1.2 V to 1.95 V)

JESD8-5 (1.8 V to 2.7 V)

JESD8-B (2.7 V to 3.6 V)

HBM JESD22-A114E Class 3B exceeds 8000 V

MM JESD22-A115-A exceeds 200 V

CDM JESD22-C101C exceeds 1000 V

500 Mbps (1.8 V to 3.3 V translation)

320 Mbps (< 1.8 V to 3.3 V translation)

320 Mbps (translate to 2.5 V or 1.8 V)

CC(A)

CC(B)

: 0.8 V to 3.6 V

CC(A)

and pins nB are referenced to V

CC(A)

and V

CC(B)

). Both V

CC(A)

CC(B)

and V

. A HIGH on DIR allows

CC(A)

CC(B)

Product data sheet

OFF

or V

can be supplied at

. The I

CC(B)

are at

OFF

Related parts for 74avch2t45

74avch2t45 Summary of contents

Page 1

... In suspend mode when either V GND level, both A and B are in the high-impedance OFF-state. The 74AVCH2T45 has active bus hold circuitry which is provided to hold unused or ﬂoating data inputs at a valid logic level. This feature eliminates the need for external pull-up or pull-down resistors ...

Page 2

... DIR CC(A) Fig 1. Logic symbol 74AVCH2T45_1 Product data sheet Dual-bit, dual-supply voltage level translator/transceiver; 3-state circuitry provides partial Power-down mode operation Description VSSOP8 plastic very thin shrink small outline package; 8 leads; body width 2.3 mm XSON8 plastic extremely thin small outline package; no leads; ...

Page 3

... V) direction control data input or output data input or output supply voltage port B Input/output [ input Z . CC( GND level, the device goes into suspend mode. Rev. 01 — 3 July 2007 74AVCH2T45 74AVCH2T45 CC(A) CC( GND 4 ...

Page 4

... Active mode Suspend or 3-state mode CC(A) CC( +125 C amb derates linearly with 8 mW/K. tot derates linearly with 2.4 mW/K. tot Conditions Active mode Suspend or 3-state mode V =0 3.6 V CCI Rev. 01 — 3 July 2007 74AVCH2T45 Min Max 0.5 +4.6 0.5 +4 [1] 0.5 +4 [1][2][3] 0 0.5 CCO [1] 0.5 +4 ...

Page 5

... GND or 3 3.3 V CC(A) CC( GND; O CCO = V = 3.3 V CC(A) CC( 0.8 V CCI 1.95 V CCI 2.7 V CCI 3.6 V CCI V = 0.8 V CCI 1.95 V CCI 2.7 V CCI 3.6 V CCI Rev. 01 — 3 July 2007 74AVCH2T45 Min Typ Max - 0. 0. 0.025 [2] - 0.5 2.5 - 0.1 1.0 - 0.1 1.0 - 1.0 ...

Page 6

... GND CC( 0 3.6 V CC(A) CC( CC(A) CC( CC(A) CC( CC(A) CC( CC(A) CC( CC(A) CC( CC(A) CC( CC(A) CC( CC(A) CC(B) Rev. 01 — 3 July 2007 74AVCH2T45 Min Typ Max [ 0 0.9 [ CCO 0.25 ...

Page 7

... CCI = 3.6 V CC(A) CC( 0.8 V CCI 1.95 V CCI 2.7 V CCI 3.6 V CCI V = 0.8 V CCI 1.95 V CCI 2.7 V CCI 3.6 V CCI Rev. 01 — 3 July 2007 74AVCH2T45 Min Typ Max [1] 125 - - 200 - - 300 - - 500 - - [1] 125 - - 200 - - 300 - - 500 - - ...

Page 8

... GND CC( 0 3.6 V CC(A) CC( CC(A) CC( CC(A) CC( CC(A) CC( CC(A) CC( CC(A) CC( CC(A) CC( CC(A) CC( CC(A) CC(B) Rev. 01 — 3 July 2007 74AVCH2T45 Min Typ Max [ 0 0.9 [ CCO 0.25 ...

Page 9

... CC( 3.6 V CC(A) CC(B) = GND CCI 0 3.6 V CC(A) CC( 3 CC(A) CC( 3.6 V CC(A) CC( CC(A) CC( GND CCI = 3.6 V CC(A) CC(B) Rev. 01 — 3 July 2007 74AVCH2T45 Min Typ Max [1] 125 - - 200 - - 300 - - 500 - - [1] 125 - - 200 - - 300 - - 500 - - [ 7 [ ...

Page 10

... Figure 6 = 0.8 V CC( 1.3 V CC( 1.6 V CC( 1.95 V CC( 2.7 V CC( 3.6 V CC(B) [3] Figure 6 = 0.8 V CC( 1.3 V CC( 1.6 V CC( 1.95 V CC( 2.7 V CC( 3.6 V CC(B) Rev. 01 — 3 July 2007 74AVCH2T45 +125 C [1] Min Typ Max Min Max ( 8.0 - ...

Page 11

... Figure 5 = 0.8 V CC( 1.3 V CC( 1.6 V CC( 1.95 V CC( 2.7 V CC( 3.6 V CC(B) [2] Figure 5 = 0.8 V CC( 1.3 V CC( 1.6 V CC( 1.95 V CC( 2.7 V CC( 3.6 V CC(B) Rev. 01 — 3 July 2007 74AVCH2T45 +125 C [1] Min Typ Max Min Max ( 20.4 - ...

Page 12

... V to 3.6 V CC(B) [4][5] Figure 6 = 0.8 V CC( 1.3 V CC( 1.6 V CC( 1.95 V CC( 2.7 V CC( 3.6 V CC(B) [4][5] Figure 6 = 0.8 V CC( 1.3 V CC( 1.6 V CC( 1.95 V CC( 2.7 V CC( 3.6 V CC(B) Rev. 01 — 3 July 2007 74AVCH2T45 +125 C [1] Min Typ Max Min Max ( 4 2.2 8 2.2 8.4 - ...

Page 13

... CC( 1.6 V CC( 1.95 V CC( 2.7 V CC( 3.6 V CC(B) [3] Figure 6 = 0.8 V CC( 3.6 V CC(B) [3] Figure 6 = 0.8 V CC( 1.3 V CC( 1.6 V CC( 1.95 V CC( 2.7 V CC( 3.6 V CC(B) Rev. 01 — 3 July 2007 74AVCH2T45 +125 C [1] Min Typ Max Min Max ( 12 1.0 8 0.7 5 0.6 4 ...

Page 14

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Page 19

... V = 0.8V CC(A) CC( 1.2 V CC(A) CC( 1.5 V CC(A) CC( 1.8 V CC(A) CC( 2.5 V CC(A) CC( 3.3 V CC(A) CC(B) and V . CC(A) CC(B) Section 13.4 “Enable in W where ns pF Rev. 01 — 3 July 2007 74AVCH2T45 Figure +125 C [1] Min Typ Max Min ( ...

Page 20

... GND outputs enabled Table 9. [1] [2] Output 0.5 V CCI CCO V 0.5 V CCI CCO V 0.5 V CCI CCO Rev. 01 — 3 July 2007 74AVCH2T45 t PLH 001aae967 t PZL PZH V M outputs outputs disabled enabled 001aae968 0 0. ...

Page 21

... PULSE DUT GENERATOR R T Load [ 1.0 ns 1.0 ns 1.0 ns Rev. 01 — 3 July 2007 74AVCH2T45 EXT 001aae331 V EXT PLH PHL PZH PHZ open ...

Page 22

... Fig 8. Unidirectional logic level-shifting application Table 11. Pin 74AVCH2T45_1 Product data sheet Dual-bit, dual-supply voltage level translator/transceiver; 3-state Figure example of the 74AVCH2T45 being used CC1 V V CC(A) CC1 GND 4 V CC1 ...

Page 23

... State DIR CTRL I/O [ HIGH voltage level LOW voltage level high-impedance OFF-state. 74AVCH2T45_1 Product data sheet Dual-bit, dual-supply voltage level translator/transceiver; 3-state shows the 74AVCH2T45 being used in a bidirectional logic level-shifting V V CC1 CC1 74AVCH2T45 V I/O-1 CC( GND 4 ...

Page 24

... In a bidirectional application, these enable times provide the maximum delay from the time the DIR bit is switched until an output is expected. For example, if the 74AVCH2T45 initially is transmitting from then the DIR bit is switched, the B port of the device must be disabled before presenting it with an input. After the B port has been disabled, an input signal applied to it appears on the corresponding A port after the speciﬁ ...

Page 25

... Dual-bit, dual-supply voltage level translator/transceiver; 3-state 2.5 scale (1) ( 0.27 0.23 2.1 2.4 0.5 0.17 0.08 1.9 2.2 REFERENCES JEDEC JEITA MO-187 Rev. 01 — 3 July 2007 74AVCH2T45 detail 3.2 0.40 0.21 0.4 0.2 0.13 3.0 0.15 0.19 EUROPEAN PROJECTION SOT765 ...

Page 26

... Dual-bit, dual-supply voltage level translator/transceiver; 3-state scale 1.05 0.35 0.40 0.6 0.5 0.95 0.27 0.32 REFERENCES JEDEC JEITA - - - MO-252 Rev. 01 — 3 July 2007 74AVCH2T45 4 ( EUROPEAN PROJECTION © NXP B.V. 2007. All rights reserved. SOT833-1 ISSUE DATE 04-07-22 04-11- ...

Page 27

... Revision history Table 15. Revision history Document ID Release date 74AVCH2T45_1 20070703 74AVCH2T45_1 Product data sheet Dual-bit, dual-supply voltage level translator/transceiver; 3-state Data sheet status Change notice Product data sheet - Rev. 01 — 3 July 2007 74AVCH2T45 Supersedes - © NXP B.V. 2007. All rights reserved ...

Page 28

... Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. http://www.nxp.com salesaddresses@nxp.com Rev. 01 — 3 July 2007 74AVCH2T45 © NXP B.V. 2007. All rights reserved ...

Page 29

... Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2007. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com 74AVCH2T45 All rights reserved. Date of release: 3 July 2007 Document identifier: 74AVCH2T45_1 ...

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