at24hc02b ATMEL Corporation, at24hc02b Datasheet - Page 7

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at24hc02b

Manufacturer Part Number
at24hc02b
Description
Two-wire Serial Eeprom 2k 256 X 8
Manufacturer
ATMEL Corporation
Datasheet

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Figure 5-3.
Figure 5-4.
Figure 5-5.
Notes:
5134E–SEEPR–3/08
SCL
SDA
SDA
SDA OUT
SCL
SDA IN
1. The write cycle time t
SCL
WORDn
Software Reset
Bus Timing
Write Cycle Timing
Start bit
t
8th BIT
SU.STA
2-WIRE SOFTWARE RESET: After an interruption in protocol, power loss or system reset, any
two-wire part can be reset by following these steps: (a) Clock up to 9 cycles, (b) Look for SDA
high in each cycle while SCL is high, (c) Create a start condition as SDA is high. The device is
ready for next communication after above steps have been completed.
1
WR
is the time from a valid stop condition of a write sequence to the end of the internal clear/write cycle.
ACK
t
HD.STA
2
t
t
F
LOW
t
AA
CONDITION
Dummy Clock Cycles
STOP
3
t
HIGH
t
HD.DAT
t
LOW
t
wr
8
(1)
t
t
SU.DAT
DH
9
CONDITION
START
Start bit
t
R
t
SU.STO
Stop bit
t
BUF
7

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