at49bv8011 ATMEL Corporation, at49bv8011 Datasheet - Page 2

• Manufacturer Part Number: at49bv8011
• Description: 8-megabit 512k X 16/1m X 8 3-volt Only Flash Memory
• Manufacturer: ATMEL Corporation

contention. This device can be read or reprogrammed
using a single 2.7V power supply, making it ideally suited
for in-system programming.
The device powers on in the read mode. Command
sequences are used to place the device in other operation
modes such as Program and Erase. The device has the
capability to protect the data in any sector. Once the data
protection for a given sector is enabled, the data in that
sector cannot be changed using input levels between
ground and V
The device is segmented into two memory planes. Reads
from memory plane B may be performed even while pro-
gram or erase functions are being executed in memory
plane A and vice versa. This operation allows improved
system performance by not requiring the system to wait for
a program or erase operation to complete before a read is
performed. To further increase the flexibility of the device, it
contains an Erase Suspend feature. This feature will put
the Erase on hold for any amount of time and let the user
read data from or program data to any of the remaining
sectors within the same memory plane. There is no reason
to suspend the erase operation if the data to be read is in
the other memory plane. The end of a program or an Erase
cycle is detected by the Ready/Busy pin, Data polling, or by
the toggle bit.
2
RDY/BUSY
RESET
VPP
A15
A14
A13
A12
A11
A10
A18
A17
WE
NC
NC
NC
A9
A8
A7
A6
A5
A4
A3
A2
A1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
CC
TSOP Top View
.
Type 1
AT49BV/LV8011(T)
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
A16
BYTE
GND
I/O15/A-1
I/O7
I/O14
I/O6
I/O13
I/O5
I/O12
I/O4
VCC
I/O11
I/O3
I/O10
I/O2
I/O9
I/O1
I/O8
I/O0
OE
GND
CE
A0
A VPP pin is provided to improve program/erase times.
This pin can be tied to V
programming and erasing, the pin should supply 4.5 to
5.5 volts during program and erase operations.
A 6-byte command (bypass unlock) sequence to remove
the requirement of entering the 3-byte program sequence
is offered to further improve programming time. After enter-
ing the 6-byte code, only single pulses on the write control
lines are required for writing into the device. This mode
(single-pulse byte/word program) is exited by powering
down the device, or by pulsing the RESET pin low for a
minimum of 50 ns and then bringing it back to V
and Erase Suspend/Resume commands will not work while
in this mode; if entered they will result in data being pro-
grammed into the device. It is not recommended that the
6-byte code reside in the software of the final product but
only exist in external programming code.
The BYTE pin controls whether the device data I/O pins
operate in the byte or word configuration. If the BYTE pin is
set at logic “1”, the device is in word configuration,
I/O0 - I/O15 are active and controlled by CE and OE.
If the BYTE pin is set at logic “0”, the device is in byte con-
figuration, and only data I/O pins I/O0 - I/O7 are active and
controlled by CE and OE. The data I/O pins I/O8 - I/O14
are tri-stated, and the I/O15 pin is used as an input for the
LSB (A-1) address function.
G
A
B
C
D
E
H
F
VSS
CE
OE
A3
A4
A2
A1
A0
1
CBGA Top View
I/O0
I/O8
I/O9
I/O1
A17
CC
A7
A5
2
A6
. To take advantage of faster
RDY/BUSY
I/O10
I/O11
I/O2
I/O3
A18
NC
NC
3
RESET
I/O12
VCC
VPP
I/O5
I/O4
WE
NC
4
I/O14
I/O13
I/O7
I/O6
A10
A11
A9
A8
5
BYTE
I/O15
VSS
A13
A12
A14
A15
A16
/A-1
6
CC
. Erase